VIPER100/SP STMICROELECTRONICS [STMicroelectronics], VIPER100/SP Datasheet - Page 17

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VIPER100/SP

Manufacturer Part Number
VIPER100/SP
Description
SMPS PRIMARY I.C.
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet
Figure 23: Recommended Layout
LAYOUT CONSIDERATIONS
Some simple rules insure a correct running of
switching power supplies. They may be classified
into two categories:
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- To minimise power loops: the way the switched
power current must be carefully analysed and
the corresponding paths must present the
smallest inner loop area as possible. This
avoids radiated EMC noises, conducted EMC
noises by magnetic coupling, and provides a
better
inductances, especially on secondary side.
efficiency
C1
by
R1
C2
eliminating
U1
VIPerXX0
OSC
13V
ISO1
VDD
+
-
parasitic
C3
COMP
R2
C4
SOURCE
DRAIN
In case of VIPer, these rules apply as shown on
figure 23. The loops C1-T1-U1, C5-D2-T1, C7-D1-
T1 must be minimised. C6 must be as close as
possible from T1. The signal components C2,
ISO1, C3 and C4 are using a dedicated track to be
connected directly to the source of the device.
- To use different tracks for low level signals and
power ones. The interferences due to a mixing
of signal and power may result in instabilities
and/or anomalous behaviour of the device in
case of violent power surge (Input overvoltages,
output short circuits...).
C5
VIPer100/SP - VIPer100A/ASP
D2
T1
C6
D1
FC00500
C7
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