ICE3BR1065J_11 INFINEON [Infineon Technologies AG], ICE3BR1065J_11 Datasheet
ICE3BR1065J_11
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ICE3BR1065J_11 Summary of contents
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CoolSET -F3R ICE3BR1065J Revision History: Previous Version: Page Subjects (major changes since last revision) For questions on technology, delivery and prices please contact the Infineon Technologies Offices in Germany or the Infineon Technologies Companies and Representatives worldwide: see our ...
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Off-Line SMPS Current Mode Controller with integrated 650V CoolMOS (frequency jitter Mode) in DIP-8 Product Highlights • Active Burst Mode to reach the lowest Standby Power Requirements < 50mW • Auto Restart protection for overload, overtemperature, overvoltage • External auto-restart ...
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Table of Contents 1 Pin Configuration and Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 1.1 Pin Configuration ...
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Input Power Curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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Pin Configuration and Functionality 1.1 Pin Configuration with PG-DIP-8 Pin Symbol Function 1 BA extended Blanking & Auto-restart 2 FB FeedBack 3 CS Current Sense/ 1) 650V CoolMOS 4 Drain 1) 650V CoolMOS 5 Drain 1) 650V CoolMOS 6 ...
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Representative Blockdiagram Figure 2 Representative Blockdiagram Version 2.0 Representative Blockdiagram 7 ® CoolSET -F3R ICE3BR1065J 28 Dec 2011 ...
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Functional Description All values which are used in the functional description are typical values. For calculating the worst cases the min/max values which can be found in section 4 Electrical Characteristics have to be considered. 3.1 Introduction ® CoolSET ...
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The Undervoltage Lockout monitors the external supply voltage V . When the SMPS is plugged to the VCC main line the internal Startup Cell is biased and starts to charge the external capacitor C connected to the VCC pin. This ...
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Soft-Start Comparator PWM Comparator FB C8 Oscillator V OSC time delay circuit (156ns) 0.67V 10k Voltage Ramp Figure 6 Improved Current Mode V OSC max. Duty Cycle Voltage Ramp 0.67V FB Gate Driver 156ns ...
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Startup Phase ftS ft ...
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Within the soft start period, the duty cycle is increasing from zero to maximum gradually (see Figure 12). In addition to Start-Up, Soft-Start is also activated at each restart attempt during Auto Restart. V SoftS t Soft-Start V SOFTS32 V ...
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Gate Driver VCC PWM-Latch 1 Gate Driver Figure 15 Gate Driver The driver-stage is optimized to minimize EMI and to provide high circuit efficiency. The switch on speed is slowed down before it reaches the integrated ® CoolMOS turn ...
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Leading Edge Blanking V Sense V csth t = 220ns LEB Figure 18 Leading Edge Blanking Whenever the integrated CoolMOS leading edge spike is generated due to the primary- side capacitances and reverse recovery time of the secondary-side rectifier. ...
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Control Unit The Control Unit contains the functions for Active Burst Mode and Auto Restart Mode. The Active Burst Mode and the Auto Restart Mode both have 20ms internal Blanking Time. For the Auto Restart Mode, a further extendable ...
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FB signal is still below 1.35V, the system enters the Active Burst Mode. This time window prevents a sudden entering into the Active Burst Mode due to large load jumps. After entering Active Burst Mode, a burst flag is ...
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Protection Modes The IC provides Auto Restart Mode as the protection feature. Auto Restart mode can prevent the SMPS from destructive states. The following table shows the relationship between possible system failures and the corresponding protection modes. VCC Overvoltage ...
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Auto Restart without extended blanking time 1ms counter BA Auto-restart Enable 8us Signal C9 0.33V Blanking Time 25. 120us C2 Blanking VCC Time VCC & C1 20.5V G1 softs_period 4. Thermal Shutdown T >140°C j ...
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Electrical Characteristics Note: All voltages are measured with respect to ground (Pin 8). The voltage levels are valid if other ratings are not violated. 4.1 Absolute Maximum Ratings Note: Absolute maximum ratings are defined as ratings, which when being ...
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Operating Range Note: Within the operating range the IC operates as described in the functional description. Parameter VCC Supply Voltage Junction Temperature of Controller Junction Temperature of ® CoolMOS 4.3 Characteristics 4.3.1 Supply Section Note: The electrical characteristics involve ...
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Internal Voltage Reference Parameter Trimmed Reference Voltage 4.3.3 PWM Section Parameter Fixed Oscillator Frequency Frequency Jittering Range Frequency Jittering period Max. Duty Cycle Min. Duty Cycle PWM-OP Gain Voltage Ramp Offset V Operating Range Min Level ...
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Control Unit Parameter Clamped V voltage during BA Normal Operating Mode Blanking time voltage limit for Comparator C3 Over Load & Open Loop Detection Limit for Comparator C4 Active Burst Mode Level for Comparator C5 Active Burst Mode Level ...
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Current Limiting Parameter Peak Current Limitation (incl. Propagation Delay) Peak Current Limitation during Active Burst Mode Leading Edge Blanking CS Input Bias Current CoolMOS Section ® 4.3.7 Parameter Drain Source Breakdown Voltage Drain Source On-Resistance Effective output capacitance, energy ...
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Typical CoolMOS Figure 27 Safe Operating area (SOA) curve for ICE3BR1065J Figure 28 SOA temperature derating coefficient curve Version 2.0 ® Typical CoolMOS Performance Characteristic ® Performance Characteristic 24 ® CoolSET -F3R ICE3BR1065J 28 Dec 2011 ...
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Figure 29 Power dissipation; P Figure 30 Drain-source breakdown voltage; V Version 2.0 Typical CoolMOS =f(T ) tot a =f(T ) BR(DSS ® CoolSET ICE3BR1065J ® Performance Characteristic 28 Dec 2011 -F3R ...
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Input Power Curve Two input power curves giving the typical input power versus ambient temperature are showed below; Vin=85Vac~265Vac (Figure 31) and Vin=230Vac+/-15% (Figure 32). The curves are derived based on a typical discontinuous mode flyback model which considers ...
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Outline Dimension PG-DIP-8 (Plastic Dual In-Line Outline) Figure 33 PG-DIP-8 (Pb-free lead plating Plastic Dual-in-Line Outline) Version 2.0 Outline Dimension 27 ® CoolSET -F3R ICE3BR1065J 28 Dec 2011 ...
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Marking Marking Figure 34 Marking for ICE3BR1065J Version 2.0 28 ® CoolSET -F3R ICE3BR1065J Marking 28 Dec 2011 ...
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Schematic for recommended PCB layout Figure 35 Schematic for recommended PCB layout General guideline for PCB layout design using F3/F3R CoolSET 1. “Star Ground “at bulk capacitor ground, C11: “Star Ground “means all primary DC grounds should be connected ...
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Spark Gap 1 and Spark Gap 2, Live / Neutral to GROUND: These 2 Spark Gaps can be used when the lightning surge requirement is >6KV. 230Vac input voltage application, the gap separation is around 5.5mm 115Vac input voltage ...
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