FAN2106_08 FAIRCHILD [Fairchild Semiconductor], FAN2106_08 Datasheet - Page 11

• Manufacturer Part Number: FAN2106_08
• Manufacturer: FAIRCHILD [Fairchild Semiconductor]

© 2006 Fairchild Semiconductor Corporation
FAN2106 Rev. 1.0.8
Calculating the Inductor Value
Typically the inductor is set for a ripple current (ΔI
10% to 35% of the maximum DC load. Regulators
requiring fast transient response use a value on the
high side of this range, while regulators that require very
low output ripple and/or use high-ESR capacitors
restrict allowable ripple current:
where f is the oscillator frequency and:
Setting the Ramp Resistor Value
The internal ramp voltage excursion (ΔV
should be set to 0.6V. R
where frequency (f) is expressed in KHz.
Setting the Current Limit
The FAN2106 uses its internal low-side MOSFET for
current-sensing. The current-limit threshold voltage
(V
drop across the low-side MOSFET, sampled at the end
of each PWM off-time/cycle.
The default threshold (I
compensated.
The 10µA current sourced from the ILIM pin can be
used to establish a lower, temperature–dependent,
current-limit threshold by connecting an external
resistor (R
where:
After 16 consecutive, pulse-by-pulse, current-limit
cycles, the fault latch is set and the regulator shuts
down. Cycling V
normal soft-start cycle (refer to Auto-Restart section).
The over-current protection fault latch is active during
the soft-start cycle.
In case R
default current limit threshold.
L
R
R
Δ
ILIM
I
RAMP
ILIM
=
L
=
I = desired current limit set point in Amps,
R
K
low-side MOSFET (Q2) from Figure 8.
V
K (
) is compared to a scaled version of the voltage
T
OUT
DS
V
K (
Ω
= the normalized temperature coefficient of the
OUT
)
Δ
Ω
is expressed in mΩ,
)
=
I
•
L
ILIM
L
=
ILIM
. 0
(1
•
•
•
18
(
45
f
) to AGND:
(1
V
-
f
is not connected, the IC uses internal
D)
IN
x
•
-
10
R
D)
CC
−
DS
. 1
−
6
or EN restores operation after a
•
) 8
•
K
LIM
V
T
RAMP
•
IN
•
V
open) is temperature
I (
OUT
•
OUT
is approximately:
f
−
−
2
Δ
2
I
L
)
+
142
RAMP
5 .
) during t
L
) of
(5)
(6)
(7)
(8)
ON
11
Loop Compensation
The loop is compensated using a feedback network
around the error amplifier. Figure 22 shows a complete
Type-3
compensation, eliminate R3 and C3.
Since the FAN2106 employs summing current-mode
architecture, Type-2 compensation can be used for
many applications. For applications that require wide
loop bandwidth and/or use very low-ESR output
capacitors, Type-3 compensation may be required. The
AN-6033 spreadsheet calculator can be used to
calculate these component values.
Protection
The converter output is monitored and protected
against extreme overload, short-circuit, over-voltage,
under-voltage, and over-temperature conditions.
An internal “Fault Latch” is set for any fault intended to
shut down the IC. When the fault latch is set, the IC
discharges V
until FB<0.25V. The MOSFET is not turned on again
unless FB>0.5V. This behavior discharges the output
without causing undershoot (negative output voltage).
Under-Voltage Shutdown
If voltage on the FB pin remains below the under-
voltage threshold for 16 consecutive clock cycles, the
fault latch is set and the converter shuts down. This
protection is not active until the internal SS ramp
reaches 1.0V during soft start.
Over-Voltage Protection / Shutdown
If voltage on the FB pin exceeds the over-voltage
threshold for two consecutive clock cycles, the fault
latch is set and shutdown occurs.
0.25/0.5V
FB
compensation
Figure 23. Latched Fault Response
Figure 22. Compensation Network
OUT
FAULT
by enhancing the low-side MOSFET
PWM LATCH
network.
For
PWM
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