ATMEGA48V_11 ATMEL [ATMEL Corporation], ATMEGA48V_11 Datasheet - Page 130
ATMEGA48V_11
Manufacturer Part Number
ATMEGA48V_11
Description
8-bit Atmel Microcontroller with 4/8/16K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATMEGA48V_11.pdf
(377 pages)
- Current page: 130 of 377
- Download datasheet (9Mb)
16.11 Register description
16.11.1
2545T–AVR–05/11
TCCR1A – Timer/Counter1 control register A
• Bit 7:6 – COM1A1:0: Compare output mode for channel A
• Bit 5:4 – COM1B1:0: Compare output mode for channel B
The COM1A1:0 and COM1B1:0 control the Output Compare pins (OC1A and OC1B respec-
tively) behavior. If one or both of the COM1A1:0 bits are written to one, the OC1A output
overrides the normal port functionality of the I/O pin it is connected to. If one or both of the
COM1B1:0 bit are written to one, the OC1B output overrides the normal port functionality of the
I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit correspond-
ing to the OC1A or OC1B pin must be set in order to enable the output driver.
When the OC1A or OC1B is connected to the pin, the function of the COM1x1:0 bits is depen-
dent of the WGM13:0 bits setting.
WGM13:0 bits are set to a Normal or a CTC mode (non-PWM).
Table 16-1.
Table 16-2
PWM mode.
Table 16-2.
Bit
(0x80)
Read/write
Initial value
COM1A1/COM1B1
COM1A1/COM1B1
0
0
1
1
0
0
1
1
shows the COM1x1:0 bit functionality when the WGM13:0 bits are set to the fast
COM1A1
Compare output mode, non-PWM.
Compare output mode, fast PWM
R/W
7
0
COM1A0
COM1A0/COM1B0
COM1A0/COM1B0
R/W
6
0
0
1
0
1
0
1
0
1
COM1B1
R/W
Table 16-1
5
0
COM1B0
R/W
4
0
Description
Normal port operation, OC1A/OC1B disconnected
Toggle OC1A/OC1B on compare match
Clear OC1A/OC1B on compare match
(set output to low level)
Set OC1A/OC1B on compare match
(set output to high level)
Description
Normal port operation, OC1A/OC1B disconnected.
WGM13:0 = 14 or 15: Toggle OC1A on compare
match, OC1B disconnected (normal port operation).
For all other WGM1 settings, normal port operation,
OC1A/OC1B disconnected.
Clear OC1A/OC1B on compare match,
set OC1A/OC1B at BOTTOM (non-inverting mode)
Set OC1A/OC1B on compare match,
clear OC1A/OC1B at BOTTOM (invertiong mode)
shows the COM1x1:0 bit functionality when the
(1)
.
R
3
0
–
ATmega48/88/168
R
2
0
–
WGM11
R/W
1
0
WGM10
R/W
0
0
TCCR1A
130
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