ATMEGA48V_11 ATMEL [ATMEL Corporation], ATMEGA48V_11 Datasheet - Page 133

• Manufacturer Part Number: ATMEGA48V_11
• Description: 8-bit Atmel Microcontroller with 4/8/16K Bytes In-System Programmable Flash
• Manufacturer: ATMEL [ATMEL Corporation]

16.11.3
2545T–AVR–05/11
TCCR1C – Timer/Counter1 control register C
When the ICR1 is used as TOP value (see description of the WGM13:0 bits located in the
TCCR1A and the TCCR1B Register), the ICP1 is disconnected and consequently the Input Cap-
ture function is disabled.
• Bit 5 – Reserved bit
This bit is reserved for future use. For ensuring compatibility with future devices, this bit must be
written to zero when TCCR1B is written.
• Bit 4:3 – WGM13:2: Waveform generation mode
See TCCR1A Register description.
• Bit 2:0 – CS12:0: Clock select
The three Clock Select bits select the clock source to be used by the Timer/Counter, see
16-10 on page 127
Table 16-5.
If external pin modes are used for the Timer/Counter1, transitions on the T1 pin will clock the
counter even if the pin is configured as an output. This feature allows software control of the
counting.
• Bit 7 – FOC1A: Force output compare for channel A
• Bit 6 – FOC1B: Force output compare for channel B
The FOC1A/FOC1B bits are only active when the WGM13:0 bits specifies a non-PWM mode..
When writing a logical one to the FOC1A/FOC1B bit, an immediate compare match is forced on
the Waveform Generation unit. The OC1A/OC1B output is changed according to its COM1x1:0
bits setting. Note that the FOC1A/FOC1B bits are implemented as strobes. Therefore it is the
value present in the COM1x1:0 bits that determine the effect of the forced compare.
A FOC1A/FOC1B strobe will not generate any interrupt nor will it clear the timer in Clear Timer
on Compare match (CTC) mode using OCR1A as TOP.
Bit
(0x82)
Read/write
Initial value
CS12
0
0
0
0
1
1
1
1
CS11
0
0
1
1
0
0
1
1
Clock select bit description.
FOC1A
R/W
7
0
and
CS10
Figure 16-11 on page
FOC1B
0
1
0
1
0
1
0
1
R/W
6
0
Description
No clock source (timer/counter stopped)
clk
clk
clk
clk
clk
External clock source on T1 pin. Clock on falling edge.
External clock source on T1 pin. Clock on rising edge.
I/O
I/O
I/O
I/O
I/O
R
5
–
0
/1 (no prescaling)
/8 (from prescaler)
/64 (from prescaler)
/256 (from prescaler)
/1024 (from prescaler)
R
4
–
0
128.
R
3
–
0
ATmega48/88/168
R
2
–
0
R
1
–
0
R
0
–
0
TCCR1C
Figure
133