ATMEGA48V_11 ATMEL [ATMEL Corporation], ATMEGA48V_11 Datasheet - Page 214
ATMEGA48V_11
Manufacturer Part Number
ATMEGA48V_11
Description
8-bit Atmel Microcontroller with 4/8/16K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATMEGA48V_11.pdf
(377 pages)
- Current page: 214 of 377
- Download datasheet (9Mb)
2545T–AVR–05/11
Figure 22-7. SCL synchronization between multiple masters.
Arbitration is carried out by all masters continuously monitoring the SDA line after outputting
data. If the value read from the SDA line does not match the value the Master had output, it has
lost the arbitration. Note that a Master can only lose arbitration when it outputs a high SDA value
while another Master outputs a low value. The losing Master should immediately go to Slave
mode, checking if it is being addressed by the winning Master. The SDA line should be left high,
but losing masters are allowed to generate a clock signal until the end of the current data or
address packet. Arbitration will continue until only one Master remains, and this may take many
bits. If several masters are trying to address the same Slave, arbitration will continue into the
data packet.
Figure 22-8. Arbitration between two masters.
SCL from
SCL from
Master A
Master B
SCL bus
Synchronized
line
SCL line
SDA from
SDA from
Master A
Master B
SDA line
START
TA
counting low period
low
Masters start
TB
low
arbitration, SDA
ATmega48/88/168
Master A loses
TA
counting high period
high
Masters start
TB
high
A
SDA
214
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