ATMEGA48V_11 ATMEL [ATMEL Corporation], ATMEGA48V_11 Datasheet - Page 225
ATMEGA48V_11
Manufacturer Part Number
ATMEGA48V_11
Description
8-bit Atmel Microcontroller with 4/8/16K Bytes In-System Programmable Flash
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
1.ATMEGA48V_11.pdf
(377 pages)
- Current page: 225 of 377
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22.7.2
2545T–AVR–05/11
Master receiver mode
Figure 22-12. Formats and states in the master transmitter mode.
In the Master Receiver mode, a number of data bytes are received from a Slave Transmitter
(Slave see
must be transmitted. The format of the following address packet determines whether Master
Transmitter or Master Receiver mode is to be entered. If SLA+W is transmitted, MT mode is
entered, if SLA+R is transmitted, MR mode is entered. All the status codes mentioned in this
section assume that the prescaler bits are zero or are masked to zero.
Successfull
transmission
to a slave
receiver
Next transfer
started with a
repeated start
condition
Not acknowledge
received after the
slave address
Not acknowledge
received after a data
byte
Arbitration lost in slave
address or data byte
Arbitration lost and
addressed as slave
Figure 22-13 on page
From master to slave
From slave to master
$08
S
SLA
W
226). In order to enter a Master mode, a START condition
MT
A or A
DATA
$18
$20
$38
$68
A
A
A
$78
Other master
Other master
n
continues
continues
P
$B0
DATA
A
Any number of data bytes
and their associated acknowledge bits
This number (contained in TWSR) corresponds
to a defined state of the 2-wire serial bus. The
prescaler bits are zero or masked to zero
A or A
ATmega48/88/168
$28
$30
$38
To corresponding
states in slave mode
A
A
Other master
$10
continues
P
R
P
S
SLA
W
R
MR
225
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