ATXMEGA128B3-AU ATMEL [ATMEL Corporation], ATXMEGA128B3-AU Datasheet - Page 4

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ATXMEGA128B3-AU

Manufacturer Part Number
ATXMEGA128B3-AU
Description
8/16-bit Atmel XMEGA B3 Microcontroller
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet

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3. Overview
8074B–AVR–02/12
The Atmel
peripheral-rich CMOS 8/16-bit microcontrollers based on the AVR enhanced RISC architecture.
By executing instructions in a single clock cycle, the Atmel AVR XMEGA B3 device achieves
throughputs CPU approaching one million instructions per second (MIPS) per megahertz, allow-
ing the system designer to optimize power consumption versus processing speed.
The AVR CPU combines a rich instruction set with 32 general purpose working registers. All 32
registers are directly connected to the arithmetic logic unit (ALU), allowing two independent reg-
isters to be accessed in a single instruction, executed in one clock cycle. The resulting
architecture is more code efficient while achieving throughputs many times faster than conven-
tional single-accumulator or CISC based microcontrollers.
The Atmel AVR XMEGA B3 devices provide the following features: in-system programmable
flash with read-while-write capabilities; internal EEPROM and SRAM; two-channel DMA
controller, four-channel event system and programmable multilevel interrupt controller,
36 general purpose I/O lines, real-time counter (RTC); Liquid Crystal Display (LCD) supporting
4x25 segment driver, ASCII character mapping and built-in contrast control (LCD); two flexible,
16-bit timer/counters with compare and PWM channels; one USART; one two-wire serial
interface (TWI); one full speed USB 2.0 interface; one serial peripheral interface (SPI); AES and
DES cryptographic engine; one 8-channel 12-bit ADCs with programmable gain; two analog
comparators (ACs) with window mode; programmable watchdog timer with separate internal
oscillator; accurate internal oscillators with PLL and prescaler; and programmable brown-out
detection.
The program and debug interface (PDI), a fast, two-pin interface for programming and debug-
ging, is available. The devices also have an IEEE std. 1149.1 compliant JTAG interface, and this
can also be used for on-chip debug and programming.
The XMEGA B3 devices have five software selectable power saving modes. The idle mode
stops the CPU while allowing the SRAM, DMA controller, event system, interrupt controller, and
all peripherals to continue functioning. The power-down mode saves the SRAM and register
contents, but stops the oscillators, disabling all other functions until the next TWI, USB resume,
or pin-change interrupt, or reset. In power-save mode, the asynchronous real-time counter con-
tinues to run, allowing the application to maintain a timer base while the rest of the device is
sleeping. In power-save mode, the LCD controller is allowed to refresh data to the panel. In
standby mode, the external crystal oscillator keeps running while the rest of the device is sleep-
ing. This allows very fast startup from the external crystal, combined with low power
consumption. In extended standby mode, both the main oscillator and the asynchronous timer
continue to run, and the LCD controller is allowed to refresh data to the panel. To further reduce
power consumption, the peripheral clock to each individual peripheral can optionally be stopped
in active mode and idle sleep mode.
Atmel offers a free QTouch
functionality into AVR microcontrollers.
The devices are manufactured using Atmel high-density, nonvolatile memory technology. The
program flash memory can be reprogrammed in-system through the PDI or JTAG interfaces. A
boot loader running in the device can use any interface to download the application program to
the flash memory. The boot loader software in the boot flash section will continue to run while
the application flash section is updated, providing true read-while-write operation. By combining
®
AVR
®
XMEGA
®
®
B3 microcontroller is a family of low-power, high-performance, and
library for embedding capacitive touch buttons, sliders and wheels
XMEGA B3
4

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