AT91SAM7S32-AI ATMEL [ATMEL Corporation], AT91SAM7S32-AI Datasheet

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AT91SAM7S32-AI

Manufacturer Part Number
AT91SAM7S32-AI
Description
AT91 ARM Thumb-based Microcontrollers
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Features
Incorporates the ARM7TDMI
32 Kbytes of Internal High-speed Flash, Organized in 256 Pages of 128 Bytes
8 Kbytes of Internal High-speed SRAM, Single-cycle Access at Maximum Speed
Memory Controller (MC)
Reset Controller (RSTC)
Clock Generator (CKGR)
Power Management Controller (PMC)
Advanced Interrupt Controller (AIC)
Debug Unit (DBGU)
Periodic Interval Timer (PIT)
Windowed Watchdog (WDT)
Real-time Timer (RTT)
One Parallel Input/Output Controller (PIOA)
Nine Peripheral Data Controller (PDC) Channels
One Synchronous Serial Controller (SSC)
One Universal Synchronous/Asynchronous Receiver Transmitters (USART)
One Master/Slave Serial Peripheral Interface (SPI)
One Three-channel 16-bit Timer/Counter (TC)
– High-performance 32-bit RISC Architecture
– High-density 16-bit Instruction Set
– Leader in MIPS/Watt
– Embedded ICE In-circuit Emulation, Debug Communication Channel Support
– Single Cycle Access at Up to 30 MHz in Worst Case Conditions
– Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed
– Page Programming Time: 4 ms, Including Page Auto-erase, Full Erase Time: 10 ms
– 10,000 Write Cycles, 10-year Data Retention Capability, Sector Lock Capabilities,
– Fast Flash Programming Interface for High Volume Production
– Embedded Flash Controller, Abort Status and Misalignment Detection
– Based on Power-on Reset and Low-power Factory-calibrated Brownout Detector
– Allows External Reset Signal Shaping and Reset Source Status
– Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and one PLL
– Software Power Optimization Capabilities, Including Slow Clock Mode (Down to
– Three Programmable External Clock Signals
– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources
– One External Interrupt Source and One Fast Interrupt Source, Spurious Interrupt
– 2-wire UART and Support for Debug Communication Channel interrupt,
– 20-bit Programmable Counter plus 12-bit Interval Counter
– 12-bit key-protected Programmable Counter
– Provides Reset or Interrupt Signals to the System
– Counter May Be Stopped While the Processor is in Debug State or in Idle Mode
– 32-bit Free-running Counter with Alarm
– Runs Off the Internal RC Oscillator
– Twenty-one Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os
– Input Change Interrupt Capability on Each I/O Line
– Individually Programmable Open-drain, Pull-up Resistor and Synchronous Output
– Independent Clock and Frame Sync Signals for Each Receiver and Transmitter
– I²S Analog Interface Support, Time Division Multiplex Support
– High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
– Individual Baud Rate Generator, IrDA Infrared Modulation/Demodulation
– Support for ISO7816 T0/T1 Smart Card, Hardware Handshaking, RS485 Support
– 8- to 16-bit Programmable Data Length, Four External Peripheral Chip Selects
– Three External Clock Inputs, Two multi-purpose I/O Pins per Channel
– Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
Security Bit Guaranteeing Code Confidentiality
500 Hz) and Idle Mode
Protected
Programmable ICE Access Prevention
®
ARM
®
Thumb
®
Processor
AT91 ARM
Thumb
Microcontrollers
AT91SAM7S32
Preliminary
6071A–ATARM–28-Oct-04
®
-based
®

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