AT91SAM7SE256 ATMEL [ATMEL Corporation], AT91SAM7SE256 Datasheet

AT91SAM7SE256

Manufacturer Part Number

AT91SAM7SE256

Description

Product Description

Manufacturer

ATMEL [ATMEL Corporation]

Datasheet

1.AT91SAM7SE256.pdf (47 pages)

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Features

Incorporates the ARM7TDMI

Internal High-speed Flash

32 Kbytes (AT91SAM7SE512/256) or 8 Kbytes (AT91SAM7SE32) of Internal

High-speed SRAM, Single-cycle Access at Maximum Speed

Memory Controller (MC)

Reset Controller (RSTC)

Clock Generator (CKGR)

Power Management Controller (PMC)

Advanced Interrupt Controller (AIC)

Debug Unit (DBGU)

Periodic Interval Timer (PIT)

Windowed Watchdog (WDT)

One External Bus Interface (EBI)

– High-performance 32-bit RISC Architecture

– High-density 16-bit Instruction Set

– Leader in MIPS/Watt

– EmbeddedICE

– 512 Kbytes, Organized in Two Contiguous Banks of 1024 Pages of 256 Bytes Dual

– 256 Kbytes (AT91SAM7SE256) Organized in One Bank of 1024 Pages of 256 Bytes

– 32 Kbytes (AT91SAM7SE32) Organized in One Bank of 256 Pages of 128 Bytes

– Single Cycle Access at Up to 30 MHz in Worst Case Conditions

– Prefetch Buffer Optimizing Thumb Instruction Execution at Maximum Speed

– Page Programming Time: 6 ms, Including Page Auto-erase, Full Erase Time: 15 ms

– 10,000 Erase Cycles, 10-year Data Retention Capability, Sector Lock Capabilities,

– Fast Flash Programming Interface for High Volume Production

– Supports SDRAM, Static Memory, Glueless Connection to CompactFlash

– Embedded Flash Controller

– Memory Protection Unit

– Abort Status and Misalignment Detection

– Based on Power-on Reset Cells and Low-power Factory-calibrated Brownout

– Provides External Reset Signal Shaping and Reset Source Status

– Low-power RC Oscillator, 3 to 20 MHz On-chip Oscillator and One PLL

– Power Optimization Capabilities, Including Slow Clock Mode (Down to 500 Hz) and

– Three Programmable External Clock Signals

– Individually Maskable, Eight-level Priority, Vectored Interrupt Sources

– Two External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt

– Two-wire UART and Support for Debug Communication Channel interrupt,

– Mode for General Purpose Two-wire UART Serial Communication

– 20-bit Programmable Counter plus 12-bit Interval Counter

– 12-bit key-protected Programmable Counter

Plane (AT91SAM7SE512)

Single Plane (AT91SAM7SE256)

Single Plane (AT91SAM7SE32)

Flash Security Bit

ECC-enabled NAND Flash

Detector

Idle Mode

Protected

Programmable ICE Access Prevention

™

In-circuit Emulation, Debug Communication Channel Support

ARM

Thumb

Processor

and

Product

Description

AT91SAM7SE512

AT91SAM7SE256

AT91SAM7SE32

Summary

Preliminary

NOTE: This is a summary document.

The complete document is available on

the Atmel website at

6222ES–ATARM–15-Dec-09

www.atmel.com.

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