LPC2420FBD208

Manufacturer Part NumberLPC2420FBD208
DescriptionFlashless 16-bit/32-bit microcontroller; Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface
ManufacturerNXP [NXP Semiconductors]
LPC2420FBD208 datasheet
 
1
Page 1
2
Page 2
3
Page 3
4
Page 4
5
Page 5
6
Page 6
7
Page 7
8
Page 8
9
Page 9
10
Page 10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
Page 1/73

Download datasheet (371Kb)Embed
Next
LPC2420/2460
Flashless 16-bit/32-bit microcontroller; Ethernet, CAN,
ISP/IAP, USB 2.0 device/host/OTG, external memory interface
Rev. 03 — 20 November 2008
1. General description
NXP Semiconductors designed the LPC2420/2460 microcontroller around a 16-bit/32-bit
ARM7TDMI-S CPU core with real-time debug interfaces that include both JTAG and
embedded trace. The LPC2420/2460 is flashless. The LPC2420/2460 can execute both
32-bit ARM and 16-bit Thumb instructions. Support for the two instruction sets means
engineers can choose to optimize their application for either performance or code size at
the sub-routine level. When the core executes instructions in Thumb state it can reduce
code size by more than 30 % with only a small loss in performance while executing
instructions in ARM state maximizes core performance.
The LPC2420/2460 microcontroller is ideal for multi-purpose communication applications.
It incorporates a 10/100 Ethernet Media Access Controller (MAC) (LPC2460 only), a USB
full-speed Device/Host/OTG Controller with 4 kB of endpoint RAM, four UARTs, two
Controller Area Network (CAN) channels (LPC2460 only), an SPI interface, two
Synchronous Serial Ports (SSP), three I
this collection of serial communications interfaces are the following feature components;
an on-chip 4 MHz internal precision oscillator, 82/98 kB of total RAM consisting of 64 kB
of local SRAM, 16 kB SRAM for Ethernet (LPC2460 only), 16 kB SRAM for general
purpose DMA, 2 kB of battery powered SRAM, and an External Memory Controller
(EMC). These features make this device optimally suited for communication gateways and
protocol converters. Complementing the many serial communication controllers, versatile
clocking capabilities, and memory features are various 32-bit timers, an improved 10-bit
ADC, 10-bit DAC, two PWM units, four external interrupt pins, and up to 160 fast GPIO
lines. The LPC2420/2460 connects 64 of the GPIO pins to the hardware based Vector
Interrupt Controller (VIC) that means these external inputs can generate edge-triggered
interrupts. All of these features make the LPC2420/2460 particularly suitable for industrial
control and medical systems.
2. Features
I
ARM7TDMI-S processor, running at up to 72 MHz.
I
82/98 kB on-chip SRAM includes:
N
64 kB of SRAM on the ARM local bus for high performance CPU access.
N
16 kB SRAM for Ethernet interface. Can also be used as general purpose SRAM.
(LPC2460 only)
N
16 kB SRAM for general purpose DMA use also accessible by the USB.
N
2 kB SRAM data storage powered from the Real-Time Clock (RTC) power domain.
I
Dual Advanced High-performance Bus (AHB) system allows simultaneous Ethernet
DMA, and USB DMA with no contention (LPC2460 only).
Preliminary data sheet
2
2
C interfaces, and an I
S interface. Supporting

LPC2420FBD208 Summary of contents

  • Page 1

    LPC2420/2460 Flashless 16-bit/32-bit microcontroller; Ethernet, CAN, ISP/IAP, USB 2.0 device/host/OTG, external memory interface Rev. 03 — 20 November 2008 1. General description NXP Semiconductors designed the LPC2420/2460 microcontroller around a 16-bit/32-bit ARM7TDMI-S CPU core with real-time debug interfaces that include ...

  • Page 2

    NXP Semiconductors I EMC provides support for asynchronous static memory devices such as RAM, ROM and flash, as well as dynamic memories such as Single Data Rate SDRAM. I Advanced Vectored Interrupt Controller (VIC), supporting vectored interrupts. ...

  • Page 3

    ... Medical systems I Protocol converter I Communications 4. Ordering information Table 1. Ordering information Type number Package Name LPC2420FBD208 LQFP208 LPC2460FBD208 LQFP208 LPC2460FET208 TFBGA208 plastic thin fine-pitch ball grid array package; 208 balls; body 15 15 4.1 Ordering options Table 2. Ordering options Type number Flash (kB) LPC2420FBD208 N/A ...

  • Page 4

    NXP Semiconductors 5. Block diagram LPC2420/2460 P0, P1, P2, P3, P4 HIGH-SPEED GPI/O 160 PINS TOTAL AHB2 ETHERNET SRAM MII/RMII MAC WITH (1) DMA EINT3 to EINT0 EXTERNAL INTERRUPTS P0 CAP0/CAP1/ CAPTURE/COMPARE CAP2/CAP3 TIMER0/TIMER1/ 4 MAT2/MAT3, TIMER2/TIMER3 2 ...

  • Page 5

    ... Fig 3. LPC2460 pinning TFBGA208 package Table 3. Pin allocation table Pin Symbol Pin Symbol Row A 1 P3[27]/D27/ 2 CAP1[0]/PWM1[4] 5 P1[4]/ENET_TX_EN 6 9 P1[17]/ENET_MDIO 10 13 P3[20]/D20/ 14 PWM0[5]/DSR1 LPC2420_60_3 Preliminary data sheet 1 LPC2420FBD208 LPC2460FBD208 52 ball A1 index area ...

  • Page 6

    NXP Semiconductors Table 3. Pin allocation table Pin Symbol Pin Symbol 17 P1[5]/ENET_TX_ER/ MCIPWR/PWM0[3] Row B 1 P3[2]/ P1[1]/ENET_TXD1 6 9 P4[25]/ DD(3V3) 17 P2[0]/PWM1[1]/TXD1/ TRACECLK Row C 1 P3[13]/D13 2 5 P3[9]/D9 6 ...

  • Page 7

    NXP Semiconductors Table 3. Pin allocation table Pin Symbol Pin Symbol Row H 1 P0[23]/AD0[0]/ 2 I2SRX_CLK/CAP3[ SSIO Row J 1 P3[6]/ P0[16]/RXD1/ 15 SSEL0/SSEL Row K 1 VREF 2 14 P4[22]/A22/ 15 TXD2/MISO1 Row ...

  • Page 8

    NXP Semiconductors Table 3. Pin allocation table Pin Symbol Pin Symbol 13 P2[17]/RAS 14 17 P4[20]/A20/ SDA2/SCK1 Row T 1 P0[27]/SDA0 SSIO 9 P1[24]/USB_RX_DM1/ 10 PWM1[5]/MOSI0 13 P1[28]/USB_SCL1/ 14 PCAP1[0]/MAT0[0] 17 P2[11]/EINT1/ MCIDAT1/I2STX_CLK Row U 1 ...

  • Page 9

    NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P0[3]/RXD0 204 D6 [1] P0[4]/ 168 B12 I2SRX_CLK/ RD2/CAP2[0] [1] P0[5]/ 166 C12 I2SRX_WS/ TD2/CAP2[1] [1] P0[6]/ 164 D13 I2SRX_SDA/ SSEL1/MAT2[0] [1] P0[7]/ 162 C13 I2STX_CLK/ SCK1/MAT2[1] [1] P0[8]/ ...

  • Page 10

    NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [2] P0[12 USB_PPWR2/ MISO1/AD0[6] [2] P0[13 USB_UP_LED2/ MOSI1/AD0[7] [1] P0[14 USB_HSTEN2/ USB_CONNECT2/ SSEL1 [1] P0[15]/TXD1/ 128 J16 SCK0/SCK [1] P0[16]/RXD1/ 130 J14 SSEL0/SSEL [1] ...

  • Page 11

    NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P0[21]/RI1/ 118 M16 MCIPWR/RD1 [1] P0[22]/RTS1/ 116 N17 MCIDAT0/TD1 [2] P0[23]/AD0[0 I2SRX_CLK/ CAP3[0] [2] P0[24]/AD0[1 I2SRX_WS/ CAP3[1] [2] P0[25]/AD0[2 I2SRX_SDA/ TXD3 [2][3] P0[26]/AD0[3]/ ...

  • Page 12

    NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P1[0]/ 196 A3 ENET_TXD0 [1] P1[1]/ 194 B5 ENET_TXD1 [1] P1[2]/ 185 D9 ENET_TXD2/ MCICLK/ PWM0[1] [1] P1[3]/ 177 A10 ENET_TXD3/ MCICMD/ PWM0[2] [1] P1[4]/ 192 A5 ENET_TX_EN [1] ...

  • Page 13

    NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P1[12]/ 157 A16 ENET_RXD3/ MCIDAT3/ PCAP0[0] [1] P1[13]/ 147 D16 ENET_RX_DV [1] P1[14]/ 184 A7 ENET_RX_ER [1] P1[15]/ 182 A8 ENET_REF_CLK/ ENET_RX_CLK [1] P1[16]/ 180 D10 ENET_MDC [1] P1[17]/ ...

  • Page 14

    NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P1[23 USB_RX_DP1/ PWM1[4]/MISO0 [1] P1[24 USB_RX_DM1/ PWM1[5]/MOSI0 [1] P1[25]/ 80 T10 USB_LS1/ USB_HSTEN1/ MAT1[1] [1] P1[26]/ 82 R10 USB_SSPND1/ PWM1[6]/ CAP0[0] [1] P1[27]/ 88 T12 ...

  • Page 15

    NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P2[0]/PWM1[1]/ 154 B17 TXD1/ TRACECLK [1] P2[1]/PWM1[2]/ 152 E14 RXD1/ PIPESTAT0 [1] P2[2]/PWM1[3]/ 150 D15 CTS1/ PIPESTAT1 [1] P2[3]/PWM1[4]/ 144 E16 DCD1/ PIPESTAT2 [1] P2[4]/PWM1[5]/ 142 D17 DSR1/ TRACESYNC ...

  • Page 16

    NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P2[9]/ 132 H16 USB_CONNECT1/ RXD2/ EXTIN0 [6] P2[10]/EINT0 110 N15 [6] P2[11]/EINT1/ 108 T17 MCIDAT1/ I2STX_CLK [6] P2[12]/EINT2/ 106 N14 MCIDAT2/ I2STX_WS [6] P2[13]/EINT3/ 102 T16 MCIDAT3/ I2STX_SDA [6] ...

  • Page 17

    NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P2[20]/DYCS0 73 T8 [1] P2[21]/DYCS1 81 U11 [1] P2[22]/DYCS2/ 85 U12 CAP3[0]/SCK0 [1] P2[23]/DYCS3 CAP3[1]/SSEL0 [1] P2[24 CKEOUT0 [1] P2[25 CKEOUT1 [1] P2[26]/ ...

  • Page 18

    NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P3[1]/D1 201 B3 [1] P3[2]/D2 207 B1 [1] P3[3]/ [1] P3[4]/ [1] P3[5]/ [1] P3[6]/ [1] P3[7]/ [1] P3[8]/D8 ...

  • Page 19

    NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P3[17]/D17/ 143 F15 PWM0[2]/RXD1 [1] P3[18]/D18/ 151 C15 PWM0[3]/CTS1 [1] P3[19]/D19/ 161 B14 PWM0[4]/DCD1 [1] P3[20]/D20/ 167 A13 PWM0[5]/DSR1 [1] P3[21]/D21/ 175 C10 PWM0[6]/DTR1 [1] P3[22]/D22/ 195 C6 PCAP0[0]/RI1 ...

  • Page 20

    NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P3[27]/D27/ 203 A1 CAP1[0]/ PWM1[4] [1] P3[28]/D28 CAP1[1]/ PWM1[5] [1] P3[29]/D29 MAT1[0]/ PWM1[6] [1] P3[30]/D30 MAT1[1]/ RTS1 [1] P3[31]/D31 MAT1[2] P4[0] ...

  • Page 21

    NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P4[9]/A9 131 H17 [1] P4[10]/A10 135 G17 [1] P4[11]/A11 145 F14 [1] P4[12]/A12 149 C16 [1] P4[13]/A13 155 B16 [1] P4[14]/A14 159 B15 [1] P4[15]/A15 173 A11 [1] P4[16]/A16 ...

  • Page 22

    NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball [1] P4[25]/WE 179 B9 [1] P4[26]/BLS0 119 L15 [1] P4[27]/BLS1 139 G15 [1] P4[28]/BLS2/ 170 C11 MAT2[0]/TXD3 [1] P4[29]/BLS3/ 176 B10 MAT2[1]/RXD3 [1] P4[30]/CS0 187 B7 [1] P4[31]/CS1 193 A4 ...

  • Page 23

    NXP Semiconductors Table 4. Pin description …continued Symbol Pin Ball V 33, 63, L3, T5, SSIO 77, 93, R9, 114, P12, 133, N16, 148, H14, 169, E15, 189, A12, [8] 200 B6 32, 84, K4, P10, SSCORE [8] ...

  • Page 24

    NXP Semiconductors 7. Functional description 7.1 Architectural overview The LPC2420/2460 microcontroller consists of an ARM7TDMI-S CPU with emulation support, the ARM7 local bus for closely coupled, high-speed access to the majority of on-chip memory, the AMBA AHB interfacing to high-speed ...

  • Page 25

    NXP Semiconductors The Thumb set’s 16-bit instruction length allows it to approach higher density compared to standard ARM code while retaining most of the ARM’s performance. 7.2 On-chip SRAM The LPC2420/2460 includes a SRAM memory reserved for ...

  • Page 26

    NXP Semiconductors 3.75 GB Fig 4. LPC2420/2460 memory map 7.4 Interrupt controller The ARM processor core has two interrupt inputs called Interrupt Request (IRQ) and Fast Interrupt Request (FIQ). The VIC takes 32 interrupt request inputs which can be programmed ...

  • Page 27

    NXP Semiconductors service routine can simply start dealing with that device. But if more than one request is assigned to the FIQ class, the FIQ service routine can read a word from the VIC that identifies which FIQ source(s) is ...

  • Page 28

    NXP Semiconductors – Asynchronous page mode read – Programmable Wait States – Bus turnaround delay – Output enable and write enable delays – Extended wait • Four chip selects for synchronous memory and four chip selects for static memory devices. ...

  • Page 29

    NXP Semiconductors • One AHB master for transferring data. This interface transfers data when a DMA request goes active. • 32-bit AHB master bus width. • Incrementing or non-incrementing addressing for source and destination. • Programmable DMA burst size. The ...

  • Page 30

    NXP Semiconductors 7.9 Ethernet (LPC2460 only) The Ethernet block contains a full featured 10 Mbit/s or 100 Mbit/s Ethernet MAC designed to provide optimized performance through the use of DMA hardware acceleration. Features include a generous suite of control registers, ...

  • Page 31

    NXP Semiconductors – Wake-on-LAN power management support allows system wake-up: using the receive filters or a magic frame detection filter. • Physical interface: – Attachment of external PHY chip through standard MII or RMII interface. – PHY register access is ...

  • Page 32

    NXP Semiconductors 7.10.2.1 Features • OHCI compliant. • Two downstream ports. • Supports per-port power switching. 7.10.3 USB OTG Controller USB OTG is a supplement to the USB 2.0 specification that augments the capability of existing mobile devices and USB ...

  • Page 33

    NXP Semiconductors • Acceptance Filter can provide FullCAN-style automatic reception for selected Standard Identifiers. • FullCAN messages can generate interrupts. 7.12 10-bit ADC The LPC2420/2460 contains one ADC single 10-bit successive approximation ADC with eight channels. 7.12.1 ...

  • Page 34

    NXP Semiconductors • Fractional divider for baud rate control, auto baud capabilities and FIFO control mechanism that enables software flow control implementation. • UART1 equipped with standard modem interface signals. This module also provides full support for hardware flow control ...

  • Page 35

    NXP Semiconductors 7.17.1 Features • The MCI provides all functions specific to the SD/MMC memory card. These include the clock generation unit, power management control, and command and data transfer. • Conforms to Multimedia Card Specification v2.11 . • Conforms ...

  • Page 36

    NXP Semiconductors 2 The I S-bus specification defines a 3-wire serial bus using one data line, one clock line, and one word select signal. The basic I master, and one slave. The I transmit and receive channel, each of which ...

  • Page 37

    NXP Semiconductors – Do nothing on match. 7.21 Pulse width modulator The PWM is based on the standard Timer block and inherits all of its features, although only the PWM function is pinned out on the LPC2420/2460. The Timer is ...

  • Page 38

    NXP Semiconductors • Pulse period and width can be any number of timer counts. This allows complete flexibility in the trade-off between resolution and repetition rate. All PWM outputs will occur at the same repetition rate. • Double edge controlled ...

  • Page 39

    NXP Semiconductors The VBAT pin supplies power only to the RTC and the Battery RAM. These two functions require a minimum of power to operate, which can be supplied by an external battery. When the CPU and the rest of ...

  • Page 40

    NXP Semiconductors PLLCLKIN and CCLK are the same value unless the PLL is active and connected. The clock frequency for each peripheral can be selected individually and is referred to as PCLK. Refer to 7.24.1.3 RTC oscillator The RTC oscillator ...

  • Page 41

    NXP Semiconductors 7.24.4 Power control The LPC2420/2460 supports a variety of power control features. There are three special modes of processor power reduction: Idle mode, Sleep mode, and Power-down mode. The CPU clock rate may also be controlled as needed ...

  • Page 42

    NXP Semiconductors 7.24.4.4 Power domains The LPC2420/2460 provides two independent power domains that allow the bulk of the device to have power removed while maintaining operation of the RTC and the Battery RAM. On the LPC2420/2460, I/O pads are powered ...

  • Page 43

    NXP Semiconductors Remark: After POR, the address ranges of chip select 1 and chip select 0 are swapped. The user code residing in the external boot memory must be linked to execute from address location 0x8000 0000. When booting from ...

  • Page 44

    NXP Semiconductors 7.26 Emulation and debugging The LPC2420/2460 support emulation and debugging via a JTAG serial port. A trace port allows tracing program execution. Debugging and trace functions are multiplexed only with GPIOs on P2[0] to P2[9]. This means that ...

  • Page 45

    NXP Semiconductors 7.26.3 RealMonitor RealMonitor is a configurable software module, developed by ARM Inc., which enables real-time debug lightweight debug monitor that runs in the background while users debug their foreground application. It communicates with the host ...

  • Page 46

    NXP Semiconductors 8. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage (3.3 V) DD(3V3) V DC-to-DC converter supply voltage DD(DCDC)(3V3) (3 analog 3.3 V pad ...

  • Page 47

    NXP Semiconductors 9. Static characteristics Table 7. Static characteristics +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter V supply voltage (3.3 V) DD(3V3) V DC-to-DC converter DD(DCDC)(3V3) supply voltage (3 ...

  • Page 48

    NXP Semiconductors Table 7. Static characteristics +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter I active mode DC-to-DC DD(DCDC)act(3V3) converter supply current (3 power-down mode DD(DCDC)pd(3V3) DC-to-DC converter supply current ...

  • Page 49

    NXP Semiconductors Table 7. Static characteristics +85 C for commercial applications, unless otherwise specified. amb Symbol Parameter V differential input DI sensitivity voltage V differential common CM mode voltage range V single-ended receiver th(rs)se switching ...

  • Page 50

    NXP Semiconductors Table 8. ADC static characteristics +85 C unless otherwise specified; ADC frequency 4.5 MHz. DDA amb Symbol Parameter E gain error G E absolute error T ...

  • Page 51

    NXP Semiconductors 1023 1022 1021 1020 1019 1018 7 code out offset error E O (1) Example of an actual transfer curve. (2) The ideal transfer curve. (3) Differential linearity ...

  • Page 52

    NXP Semiconductors AD0[y] Fig 6. Suggested ADC interface - LPC2420/2460 AD0[y] pin LPC2420_60_3 Preliminary data sheet LPC2XXX 20 k SAMPLE SSIO, SSCORE Rev. 03 — 20 November 2008 LPC2420/2460 Flashless 16-bit/32-bit microcontroller R vsi ...

  • Page 53

    NXP Semiconductors 10. Dynamic characteristics Table 9. Dynamic characteristics of USB pins (full-speed pF 1 Symbol Parameter t rise time r t fall time f t differential rise ...

  • Page 54

    NXP Semiconductors Table 10. Dynamic characteristics +85 C for commercial applications; V amb Symbol Parameter External clock f oscillator frequency osc T clock cycle time cy(clk) t clock HIGH time CHCX t clock LOW time ...

  • Page 55

    Table 11. Dynamic characteristics: Static external memory interface pF amb DD(DCDC)(3V3) Symbol Parameter Conditions [1] Common to read and write cycles t CS LOW to address valid CSLAV ...

  • Page 56

    Table 11. Dynamic characteristics: Static external memory interface pF amb DD(DCDC)(3V3) Symbol Parameter Conditions t WE HIGH to data invalid WEHDNV time t BLS HIGH to address BLSHANV ...

  • Page 57

    NXP Semiconductors Table 12. Dynamic characteristics: Dynamic external memory interface pF amb Symbol Parameter Common t chip select valid delay time d(SV) t chip select hold time h(S) ...

  • Page 58

    NXP Semiconductors 10.1 Timing Fig 7. External clock timing (with an amplitude of at least V t PERIOD differential data lines Fig 8. Differential data-to-EOP transition skew and EOP width shifting edges SCK MOSI MISO Fig 9. MISO line set-up ...

  • Page 59

    NXP Semiconductors CS addr data t CSLOEL OE BLS Fig 10. External memory read access CS BLS/WE addr data OE Fig 11. External memory write access LPC2420_60_3 Preliminary data sheet t CSLAV OELAV t OELOEH t BLSLAV ...

  • Page 60

    NXP Semiconductors Fig 12. Signal timing 11. Application information 11.1 Suggested USB interface solutions LPC24XX Fig 13. LPC2420/2460 USB interface on a self-powered device LPC2420_60_3 Preliminary data sheet reference clock t d(XXX) output signal (O) input signal (I) V DD(3V3) ...

  • Page 61

    NXP Semiconductors LPC24XX Fig 14. LPC2420/2460 USB interface on a bus-powered device LPC2420_60_3 Preliminary data sheet Flashless 16-bit/32-bit microcontroller V DD(3V3 USB_UP_LED 1 BUS USB_D USB_D V V ...

  • Page 62

    NXP Semiconductors RSTOUT USB_SCL1 USB_SDA1 USB_INT1 USB_D+1 USB_D 1 USB_UP_LED1 LPC24XX USB_PPWR2 USB_OVRCR2 USB_PWRD2 USB_D+2 USB_D 2 USB_UP_LED2 Fig 15. LPC2420/2460 USB OTG port configuration: USB port 1 OTG dual-role device, USB port 2 host LPC2420_60_3 Preliminary data sheet V ...

  • Page 63

    NXP Semiconductors RSTOUT USB_TX_E1 USB_TX_DP1 USB_TX_DM1 USB_RCV1 USB_RX_DP1 USB_RX_DM1 LPC24XX USB_SCL1 USB_SDA1 USB_INT1 USB_UP_LED1 Fig 16. LPC2420/2460 USB OTG port configuration: VP_VM mode LPC2420_60_3 Preliminary data sheet V DD RESET_N OE_N/INT_N DAT_VP SE0_VM RCV ISP1301 ADR/PSW ...

  • Page 64

    NXP Semiconductors USB_UP_LED1 USB_D+1 USB_D 1 USB_PWRD1 USB_OVRCR1 USB_PPWR1 LPC24XX USB_UP_LED2 USB_CONNECT2 USB_D+2 USB_D 2 V BUS Fig 17. LPC2420/2460 USB OTG port configuration: USB port 2 device, USB port 1 host LPC2420_60_3 Preliminary data sheet ...

  • Page 65

    NXP Semiconductors USB_UP_LED1 USB_D+1 USB_D 1 USB_PWRD1 USB_OVRCR1 USB_PPWR1 LPC24XX USB_PPWR2 USB_OVRCR2 USB_PWRD2 USB_D+2 USB_D 2 USB_UP_LED2 Fig 18. LPC2420/2460 USB OTG port configuration: USB port 1 host, USB port 2 host 11.2 Suggested boot memory interface solutions ‘a_m’ and ...

  • Page 66

    NXP Semiconductors Fig 20. Booting from a single 16-bit memory chip LPC2420_60_3 Preliminary data sheet CS1 16-bit BLS1 MEMORY LB BLS0 IO[15:0] D[15:0] A[a_m:0] A[a_b:1] 002aad323 Rev. 03 — 20 November 2008 LPC2420/2460 Flashless ...

  • Page 67

    NXP Semiconductors 12. Package outline LQFP208; plastic low profile quad flat package; 208 leads; body 1 156 157 pin 1 index 208 DIMENSIONS (mm are the original ...

  • Page 68

    NXP Semiconductors TFBGA208: plastic thin fine-pitch ball grid array package; 208 balls; body 0.7 mm ball A1 index area ...

  • Page 69

    NXP Semiconductors 13. Abbreviations Table 13. Acronym ADC AHB AMBA APB BOD CAN DAC DCC DMA EOP ETM GP GPIO IrDA JTAG MII MIIM OHCI OTG PHY PLL POR PWM RMII SD/MMC SE0 SPI SSI SSP TTL UART USB LPC2420_60_3 ...

  • Page 70

    ... LPC2460_1 20080123 LPC2420_60_3 Preliminary data sheet Data sheet status Preliminary data sheet 1, Table 2, added LPC2420FBD208. Table 11 “Dynamic characteristics: Static external memory Table 12, dynamic external memory interface characteristics. Figure 10 “External memory read access” 7, updated I and I footnote. OHS ...

  • Page 71

    NXP Semiconductors 15. Legal information 15.1 Data sheet status [1][2] Document status Product status Objective [short] data sheet Development Preliminary [short] data sheet Qualification Product [short] data sheet Production [1] Please consult the most recently issued document before initiating or ...

  • Page 72

    NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . ...

  • Page 73

    NXP Semiconductors 15.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 71 15.2 Definitions . . . . . . . . . ...