MCF51JF128VLH FREESCALE [Freescale Semiconductor, Inc], MCF51JF128VLH Datasheet
MCF51JF128VLH
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MCF51JF128VLH Summary of contents
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... Freescale Semiconductor Data Sheet: Technical Data MCF51JF128 Supports the MCF51JF128VLH, MCF51JF128VHS, MCF51JF64VLF, MCF51JF64VHS, MCF51JF32VHS, MCF51JF32VFM Features • Operating characteristics – Voltage range: 1. 3.6 V – Flash write voltage range: 1. 3.6 V – Temperature range (ambient): -40°C to 105°C • Core – MHz V1 ColdFire CPU – ...
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Ordering parts...........................................................................3 1.1 Determining valid orderable parts......................................3 2 Part identification......................................................................3 2.1 Description.........................................................................3 2.2 Format...............................................................................3 2.3 Fields.................................................................................3 2.4 Example............................................................................4 3 Terminology and guidelines......................................................4 3.1 Definition: Operating requirement......................................4 3.2 Definition: Operating behavior...........................................5 3.3 Definition: Attribute............................................................5 3.4 Definition: Rating...............................................................5 3.5 Result of ...
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Ordering parts 1.1 Determining valid orderable parts Valid orderable part numbers are provided on the web. To determine the orderable part numbers for this device http://www.freescale.com. 2. Perform a part number search for the following partial ...
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... All parts also have FlexNVM, FlexRAM, and RAM. 2.4 Example This is an example part number: MCF51JF128VLH 3 Terminology and guidelines 3.1 Definition: Operating requirement An operating requirement is a specified value or range of values for a technical characteristic that you must guarantee during operation to avoid incorrect operation and possibly decreasing the useful life of the chip ...
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Definition: Operating behavior An operating behavior is a specified value or range of values for a technical characteristic that are guaranteed during operation if you meet the operating requirements and any other specified conditions. 3.2.1 Example This is an ...
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Terminology and guidelines 3.4.1 Example This is an example of an operating rating: Symbol Description V 1.0 V core supply DD voltage 3.5 Result of exceeding a rating Measured characteristic 3.6 Relationship between ratings and ...
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During normal operation, don’t exceed any of the chip’s operating requirements. • If you must exceed an operating requirement at times other than during normal operation (for example, during power sequencing), limit the duration as much as possible. 3.8 ...
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Ratings 5000 4500 4000 3500 3000 2500 2000 1500 1000 500 0 0.90 0.95 4 Ratings 4.1 Thermal handling ratings Symbol Description T Storage temperature STG T Solder temperature, lead-free SDR Solder temperature, leaded 1. Determined according to JEDEC Standard ...
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ESD handling ratings Symbol Description V Electrostatic discharge voltage, human body model HBM V Electrostatic discharge voltage, charged-device model CDM I Latch-up current at ambient temperature of 105°C LAT 1. Determined according to JEDEC Standard JESD22-A114, Electrostatic Discharge (ESD) ...
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Nonswitching electrical specifications Symbol V 3.3 V supply voltage DD 5.2 Nonswitching electrical specifications 5.2.1 Voltage and Current Operating Requirements Table 1. Voltage and current operating requirements Symbol Description V Supply voltage DD V Analog supply voltage DDA V – ...
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LVD and POR operating requirements Table 2. LVD and POR operating requirements Symbol Description V Falling VDD POR detect voltage POR V Falling low-voltage detect threshold — high LVDH range (LVDV=01) Low-voltage warning thresholds — high range V • ...
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Nonswitching electrical specifications 5.2.3 Voltage and current operating behaviors Table 3. Voltage and current operating behaviors Symbol Description V Output high voltage — high drive strength OH • 2.7 V ≤ V ≤ 3 • 1.71 V ...
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Table 4. Power mode transition operating behaviors Symbol Description t After a POR event, amount of time from the point V POR reaches 1 execution of the first instruction across the operating temperature range of the chip. • ...
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Nonswitching electrical specifications Table 5. Power consumption operating behaviors (continued) Symbol Description I Run mode current — all peripheral clocks DD_RUN enabled, code executing from RAM, exercising flash memory • @ 1.8 V • Wait mode ...
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MHz core and system clocks, and 1 MHz bus clock. MCG configured for BLPE mode. All peripheral clocks disabled. Code executing from flash memory MHz core and system clocks, and 1 MHz bus clock. MCG configured ...
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Nonswitching electrical specifications Figure 1. Run mode supply current vs. core frequency 16 MCF51JF128 Data Sheet, Rev. 6, 01/2012. Freescale Semiconductor, Inc. ...
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Figure 2. VLPR mode supply current vs. core frequency 5.2.6 EMC radiated emissions operating behaviors Table 6. EMC radiated emissions operating behaviors Symbol Description V Radiated emissions voltage, band 1 RE1 V Radiated emissions voltage, band 2 RE2 V Radiated ...
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Nonswitching electrical specifications ° kHz (crystal OSC 3. Specified according to Annex D of IEC Standard 61967-2, Measurement of Radiated Emissions—TEM Cell and Wideband TEM Cell ...
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General Switching Specifications These general purpose specifications apply to all signals configured for EGPIO, MTIM, 2 CMT, PDB, IRQ, and I C signals. The conditions are 50 pf load, V and full temperature range. The GPIO are set for ...
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Thermal specifications The following general purpose specifications apply to all signals configured for RGPIO, FTM, and UART. The conditions are 25 pf load, V temperature range. The GPIO are set for high drive, no slew rate control, and no input ...
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Thermal attributes Board type Symbol Description Single-layer R Thermal resistance, junction to θJA (1s) ambient (natural convection) Four-layer R Thermal resistance, junction to θJA (2s2p) ambient (natural convection) Single-layer R Thermal resistance, junction to θJMA (1s) ambient (200 ft./min. ...
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Clock modules 1. To enter BDM mode following a POR, BKGD/MS should be held low during the power-up and for a hold time rises above LVD 6.2 System modules There are no specifications necessary ...
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Table 13. MCG specifications (continued) Symbol Description f DCO output Low range (DRS=00) dco frequency range Mid range (DRS=01) Mid-high range (DRS=10) High range (DRS=11) f DCO output Low range (DRS=00) dco_t_DMX3 frequency 2 Mid range (DRS=01) Mid-high range (DRS=10) ...
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Clock modules Table 13. MCG specifications (continued) Symbol Description D Lock entry frequency tolerance lock D Lock exit frequency tolerance unl t Lock detector detection time pll_lock 1. This parameter is measured with the internal reference (slow clock) being used ...
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Table 14. Oscillator DC electrical specifications (continued) Symbol Description I Supply current — high gain mode (HGO=1) DDOSC • 32 kHz • 1 MHz • 4 MHz • 8 MHz (RANGE=01) • 16 MHz • 24 MHz • 32 MHz ...
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Clock modules Table 14. Oscillator DC electrical specifications (continued) Symbol Description Peak-to-peak amplitude of oscillation (oscillator mode) — low-frequency, low-power mode (HGO=0) Peak-to-peak amplitude of oscillation (oscillator mode) — low-frequency, high-gain mode (HGO=1) Peak-to-peak amplitude of oscillation ...
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Proper PC board layout procedures must be followed to achieve specifications. 4. Crystal startup time is defined as the time between the oscillator being enabled and the OSCINIT bit in the MCG_S register being set. 6.4 Memories and memory ...
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Memories and memory interfaces Table 17. Flash command timing specifications (continued) Symbol Description t Erase Flash Sector execution time ersscr Program Section execution time t • 512 B flash pgmsec512 • flash t pgmsec1k t Read 1s All ...
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Table 17. Flash command timing specifications (continued) Symbol Description Longword-write to FlexRAM execution time: t • EEPROM backup eewr32b8k • EEPROM backup t eewr32b16k • EEPROM backup t eewr32b32k 1. Assumes 25MHz flash clock ...
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Memories and memory interfaces Table 19. NVM reliability specifications (continued) Symbol Description Write endurance n • EEPROM backup to FlexRAM ratio = 16 nvmwree16 • EEPROM backup to FlexRAM ratio = 128 n nvmwree128 • EEPROM backup to FlexRAM ratio ...
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FlexRAM • 0.50 for 16-bit or 32-bit writes to FlexRAM • n — data flash cycling endurance nvmcycd Figure 5. EEPROM backup writes to FlexRAM 6.4.2 EzPort Switching Specifications All timing is shown with ...
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Memories and memory interfaces Table 20. EzPort switching specifications (continued) Num Description EP3 EZP_CS input valid to EZP_CK high (setup) EP4 EZP_CK high to EZP_CS input invalid (hold) EP5 EZP_D input valid to EZP_CK high (setup) EP6 EZP_CK high to ...
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The following timing numbers indicate when data is latched or driven onto the external bus, relative to the Mini-Flexbus output clock (FB_CLK). All other timing relationships can be derived from these values. Table 21. Flexbus switching specifications Num Description Operating ...
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Memories and memory interfaces FB1 FB_CLK FB_A[Y] FB2 FB_D[X] Address FB_RW FB_TS FB_ALE FB_CSn FB_OEn FB_BEn FB_TA FB_TSIZ[1:0] Figure 7. Mini-FlexBus read timing diagram 34 FB3 FB5 Address FB4 Data AA=1 AA=0 FB4 FB5 AA=1 AA=0 TSIZ MCF51JF128 Data Sheet, ...
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FB1 FB_CLK FB2 FB_A[Y] FB_D[X] Address FB_RW FB_TS FB_ALE FB_CSn FB_OEn FB_BEn FB_TA FB_TSIZ[1:0] Figure 8. Mini-FlexBus write timing diagram 6.5 Security and integrity modules There are no specifications necessary for the device's security and integrity modules. Freescale Semiconductor, Inc. ...
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Analog 6.6 Analog 6.6.1 ADC electrical specifications All ADC channels meet the 12-bit single-ended accuracy specifications. 6.6.1.1 12-bit ADC operating conditions Table 22. 12-bit ADC operating conditions Symbol Description Conditions V Supply voltage Absolute DDA ΔV Supply voltage Delta to ...
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For guidelines and examples of conversion rate calculation, download the ADC calculator tool: http://cache.freescale.com/ files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp Figure 9. ADC input impedance equivalency diagram 6.6.1.2 12-bit ADC electrical characteristics Table 23. 12-bit ADC ...
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Analog Table 23. 12-bit ADC characteristics (V Symbol Description Conditions E Full-scale error • 12 bit modes FS • <12 bit modes E Quantization • 12 bit modes Q error E Input leakage IL error Temp sensor –40°C to 105°C ...
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Table 24. Comparator and 6-bit DAC electrical specifications (continued) Symbol Description V Analog comparator hysteresis H • CR0[HYSTCTR • CR0[HYSTCTR • CR0[HYSTCTR • CR0[HYSTCTR Output high CMPOh V Output low CMPOl ...
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Analog 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0.01 0 0.1 0.4 0.7 Figure 10. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE= 1.3 1.6 1.9 Vin level (V) MCF51JF128 Data Sheet, Rev. 6, 01/2012. HYSTCTR S etting 2.2 ...
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Figure 11. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=1) 6.6.3 12-bit DAC electrical characteristics 6.6.3.1 12-bit DAC operating requirements Table 25. 12-bit DAC operating requirements ...
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DAC electrical characteristics 6.6.3.2 12-bit DAC operating behaviors Table 26. 12-bit DAC operating behaviors Symbol Description I Supply current — low-power mode DDA_DACL P I Supply current — high-speed mode DDA_DAC HP t Full-scale settling time (0x080 to 0xF7F) ...
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Calculated by a best fit curve from V 6. VDDA = 3.0V, reference select set for VDDA (DACx_CO:DACRFS = 1), high power mode(DACx_C0:LPEN = 0), DAC set to 0x800, Temp range from -40C to 105C Figure 12. Typical INL ...
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DAC electrical characteristics Figure 13. Offset at half scale vs. temperature 6.6.4 Voltage reference electrical specifications Table 27. VREF full-range operating requirements Symbol Description V Supply voltage DDA T Temperature A C Output load capacitance must ...
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Table 28. VREF full-range operating behaviors Symbol Description V Voltage reference output with factory trim at out nominal V and temperature=25C DDA V Voltage reference output with— factory trim out V Voltage reference output — user trim out V Voltage ...
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Communication interfaces 6.8 Communication interfaces 6.8.1 USB electrical specifications The USB electricals for the USB On-the-Go module conform to the standards documented by the Universal Serial Bus Implementers Forum. For the most up-to-date standards, visit http://www.usb.org. 6.8.2 USB DCD electrical ...
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Table 32. USB VREG electrical specifications (continued) Symbol Description V Regulator output voltage — Input supply Reg33out (VREGIN) > 3.6 V • Run mode • Standby mode V Regulator output voltage — Input supply Reg33out (VREGIN) < 3.6 V, pass-through ...
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Communication interfaces Table 33. SPI master mode timing (continued) Num. Symbol Description 6 t Data setup time (inputs Data hold time (inputs Data valid (after SPSCK edge Data hold time (outputs) ...
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SS (OUTPUT SPSCK (CPOL 0) = (OUTPUT) 5 SPSCK (CPOL 1) = (OUTPUT) 6 MISO MSB IN (INPUT) 8 MOSI PORT DATA MASTER MSB OUT (OUTPUT) 1.If configured as output 2. LSBF = 0. For LSBF = ...
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Communication interfaces Table 34. SPI slave mode timing (continued) Num. Symbol Description 12 t Rise time input RI t Fall time input Rise time output RO t Fall time output FO SS (INPUT) SPSCK (CPOL 0) = ...
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I2S/SAI Switching Specifications This section provides the AC timing for the I2S/SAI module in master mode (clocks are driven) and slave mode (clocks are input). All timing is given for noninverted serial clock polarity (TCR2[BCP RCR2[BCP] is ...
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Communication interfaces I2S_MCLK (output) I2S_TX_BCLK/ S4 I2S_RX_BCLK (output) S5 I2S_TX_FS/ I2S_RX_FS (output) I2S_TX_FS/ I2S_RX_FS (input) S7 I2S_TXD I2S_RXD Figure 18. I2S/SAI timing — master modes Table 36. I2S/SAI slave mode timing Num. Characteristic Operating voltage S11 I2S_RX_BCLK cycle time (input) ...
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I2S_TX_BCLK/ S12 I2S_RX_BCLK (input) S15 I2S_TX_FS/ I2S_RX_FS (output) S13 I2S_TX_FS/ I2S_RX_FS (input) S15 I2S_TXD S17 I2S_RXD Figure 19. I2S/SAI timing — slave modes 6.9 Human-machine interfaces (HMI) 6.9.1 TSI electrical specifications Table 37. TSI electrical specifications Symbol Description V Operating ...
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Dimensions Table 37. TSI electrical specifications (continued) Symbol Description I Current added in run mode TSI_RUN I Low power mode current adder TSI_LP 1. The TSI module is functional with capacitance values outside this range. However, optimal performance is not ...
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Pinout 8.1 Signal Multiplexing and Pin Assignments The following table shows the signals available on each pin and the locations of these pins on the devices supported by this document. The Port Mux Control module is responsible for selecting ...
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Pinout 64- 48- 44- 32- Default ALT0 pin pin pin pin USB0_DP USB0_DP VSS VSS — VDD VDD ADC0_SE8/ ADC0_SE8/ TSI0_CH0 TSI0_CH0 26 — — ...
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Default ALT0 pin pin pin pin EXTAL2 EXTAL2 VDD VDD VSS VSS EXTAL1 EXTAL1 XTAL1 XTAL1 ...
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Pinout VDD 1 VSS 2 PTC6 3 PTC7 4 PTD0 5 PTD1 6 PTA0 7 PTA1 8 PTA2 9 PTA3 10 ADC0_SE2 11 ADC0_SE3 12 VDDA 13 VREFH 14 VREF_OUT 15 VREFL 16 58 Figure 20. 64-pin LQFP MCF51JF128 Data ...
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PTD0 1 PTD1 2 PTA0 3 PTA1 4 PTA2 5 PTA3 6 ADC0_SE2 7 ADC0_SE3 8 VDDA 9 VREFH 10 VREF_OUT 11 VREFL 12 Freescale Semiconductor, Inc. Figure 21. 48-pin LQFP MCF51JF128 Data Sheet, Rev. 6, 01/2012. Pinout VSS 36 ...
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Pinout PTA0 PTA1 PTA2 PTA3 ADC0_SE2 ADC0_SE3 VDDA VREFH VREF_OUT VREFL VSSA Figure 22. 44-pin Laminate QFN MCF51JF128 Data Sheet, Rev. 6, 01/2012. EXTAL1 33 VSS 32 VDD ...
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PTA0 PTA1 PTA2 PTA3 ADC0_SE2 ADC0_SE3 VDDA VSSA 8.3 Module-by-module signals • On PTB0, EZP_MS_b is active only during reset. Refer to the detailed boot description. • PTC1 is open drain. Table 38. Module signals by GPIO port and pin ...
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Pinout Table 38. Module signals by GPIO port and pin (continued) 64-pin 48-pin ...
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Table 38. Module signals by GPIO port and pin (continued) 64-pin 48-pin ...
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Pinout Table 38. Module signals by GPIO port and pin (continued) 64-pin 48-pin ...
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Table 38. Module signals by GPIO port and pin (continued) 64-pin 48-pin ...
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Pinout Table 38. Module signals by GPIO port and pin (continued) 64-pin 48-pin ...
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Table 38. Module signals by GPIO port and pin (continued) 64-pin 48-pin ...
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Pinout Table 38. Module signals by GPIO port and pin (continued) 64-pin 48-pin ...
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Table 38. Module signals by GPIO port and pin (continued) 64-pin 48-pin ...
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Pinout Table 38. Module signals by GPIO port and pin (continued) 64-pin 48-pin ...
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Table 38. Module signals by GPIO port and pin (continued) 64-pin 48-pin ...
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Revision History 9 Revision History The following table summarizes content changes since the previous release of this document. Rev. No. Date Substantial Changes 6 01/2012 Thermal operating requirements: Changed maximum T 72 Table 39. Revision History MCF51JF128 Data Sheet, Rev. ...
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How to Reach Us: Home Page: www.freescale.com Web Support: http://www.freescale.com/support USA/Europe or Locations Not Listed: Freescale Semiconductor Technical Information Center, EL516 2100 East Elliot Road Tempe, Arizona 85284 +1-800-521-6274 or +1-480-768-2130 www.freescale.com/support Europe, Middle East, and Africa: Freescale Halbleiter Deutschland ...