R5F21344PJFP RENESAS [Renesas Technology Corp], R5F21344PJFP Datasheet - Page 35

• Manufacturer Part Number: R5F21344PJFP
• Description: R8C/34P Group, R8C/34R Group RENESAS MCU
• Manufacturer: RENESAS [Renesas Technology Corp]

Under development
R8C/34P Group, R8C/34R Group
R01DS0027EJ0010 Rev.0.10
Jul 05, 2011
Figure 5.2
Table 5.8
Notes:
−
−
−
−
−
t
−
−
t
READY)
−
−
−
−
d(SR-SUS)
d(CMDRST-
Symbol
1. V
2. Definition of programming/erasure endurance
3. Endurance to guarantee all electrical characteristics after program and erase. (1 to Min. value can be guaranteed).
4. In a system that executes multiple programming operations, the actual erasure count can be reduced by writing to sequential
5. If an error occurs during block erase, attempt to execute the clear status register command, then execute the block erase
6. Customers desiring program/erase failure rate information should contact their Renesas technical support representative.
7.
8. This data hold time includes 3,000 hours in Ta = 125 ° C and 7,000 hours in Ta = 85 ° C.
The programming and erasure endurance is defined on a per-block basis.
If the programming and erasure endurance is n (n = 10,000), each block can be erased n times. For example, if 1,024 1-byte
writes are performed to different addresses in block A, a 1 Kbyte block, and then the block is erased, the
programming/erasure endurance still stands at one.
However, the same address must not be programmed more than once per erase operation (overwriting prohibited).
addresses in turn so that as much of the block as possible is used up before performing an erase operation. For example,
when programming groups of 16 bytes, the effective number of rewrites can be minimized by programming up to 128 groups
before erasing them all in one operation. In addition, averaging the erasure endurance between blocks A to D can further
reduce the actual erasure endurance. It is also advisable to retain data on the erasure endurance of each block and limit the
number of erase operations to a certain number.
command at least three times until the erase error does not occur.
The data hold time includes time that the power supply is off or the clock is not supplied.
CC
Program/erase endurance
Byte program time
(program/erase endurance ≤ 1,000 times)
Byte program time
(program/erase endurance > 1,000 times)
Block erase time
(program/erase endurance ≤ 1,000 times)
Block erase time
(program/erase endurance > 1,000 times)
Time delay from suspend request until
suspend
Interval from erase start/restart until
following suspend request
Time from suspend until erase restart
Time from when command is forcibly
terminated until reading is enabled
Program, erase voltage
Read voltage
Program, erase temperature
Data hold time
= 2.7 to 5.5 V and T
Suspend request
FST6, FST7: Bit in FST register
FMR21: Bit in FMR2 register
Preliminary document
Specifications in this document are tentative and subject to change.
Time delay until Suspend
Flash Memory (Data flash Block A to Block D) Electrical Characteristics
(FMR21 bit)
FST7 bit
FST6 bit
(7)
Parameter
opr
= − 40 to 85 ° C (J version) / − 40 to 125 ° C (K version), unless otherwise specified.
(2)
Ambient temperature =
55 ° C
(8)
Fixed time
Conditions
t
d(SR-SUS)
Clock-dependent
time
10,000
Min.
− 40
2.7
2.7
20
0
−
−
−
−
−
−
−
(3)
Access restart
Typ.
160
300
0.2
0.3
−
−
−
−
−
−
−
−
−
Standard
5. Electrical Characteristics
30+CPU clock × 1
30+CPU clock × 1
125 ° C (K version)
3+CPU clock × 3
85 ° C (J version),
cycles
Max.
cycle
cycle
950
950
5.5
5.5
1
1
−
−
−
Page 35 of 53
times
year
Unit
ms
µ s
µ s
µ s
µ s
µ s
° C
V
V
s
s