M30622ECTFP MITSUBISHI [Mitsubishi Electric Semiconductor], M30622ECTFP Datasheet - Page 64

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M30622ECTFP

Manufacturer Part Number
M30622ECTFP
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Manufacturer
MITSUBISHI [Mitsubishi Electric Semiconductor]
Datasheet
Interrupt
Figure 1.14.9. Maskable interrupts priorities (peripheral I/O interrupts)
Processor interrupt priority level (IPL)
Tentative Specifications REV.A
UART2 transmission/NACK
Interrupt enable flag (I flag)
UART2 reception/ACK
Bus collision detection
Priority level of each interrupt
S
UART1 transmission
UART0 transmission
Key input interrupt
UART1 reception
pecifications in this manual are tentative and subject to change.
Serial I/O3/INT4
Watchdog timer
A-D conversion
Serial I/O4/INT5
Address match
Timer B2
Timer B0
Timer A3
Timer A1
Timer B4
Timer B1
Timer A4
Timer A2
Timer B3
Timer B5
reception
Timer A0
UART0
DMA1
DMA0
Reset
INT1
INT2
INT0
DBC
INT3
NMI
Level 0 (initial value)
High
Low
Priority of peripheral I/O interrupts
(if priority levels are same)
Note 1: In M30623 (80-pin package), can not use INT3 to INT5 as
64
the interrupt factors, because P1
have no corresponding external pin.
accepted
Interrupt
request
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
5
/D
Mitsubishi microcomputers
13
/INT3 to P1
M16C / 62T Group
7
/D
15
/INT5

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