M30622M4 MITSUBISHI [Mitsubishi Electric Semiconductor], M30622M4 Datasheet - Page 112

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M30622M4

Manufacturer Part Number
M30622M4
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Manufacturer
MITSUBISHI [Mitsubishi Electric Semiconductor]
Datasheet

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Serial I/O
112
Serial I/O
UART0 to 2
Table 1.19.1. Comparison of functions of UART0 through UART2
Note 1: Only when clock synchronous serial I/O mode.
Note 2: Only when clock synchronous serial I/O mode and 8-bit UART mode.
Note 3: Only when UART mode.
Note 4: Using for SIM interface.
Serial I/O is configured as five channels: UART0, UART1, UART2, S I/O3 and S I/O4.
UART0, UART1 and UART2 each have an exclusive timer to generate a transfer clock, so they operate
independently of each other.
Figure 1.19.1 shows the block diagram of UART0, UART1 and UART2. Figures 1.19.2 and 1.19.3 show
the block diagram of the transmit/receive unit.
UARTi (i = 0 to 2) has two operation modes: a clock synchronous serial I/O mode and a clock asynchronous
serial I/O mode (UART mode). The contents of the serial I/O mode select bits (bits 0 to 2 at addresses
03A0
UART. Although a few functions are different, UART0, UART1 and UART2 have almost the same functions.
UART2, in particular, is used for the SIM interface with some extra settings added in clock-asynchronous
serial I/O mode (Note). It also has the bus collision detection function that generates an interrupt request if
the TxD pin and the RxD pin are different in level.
Table 1.19.1 shows the comparison of functions of UART0 through UART2, and Figures 1.19.4 to 1.19.8
show the registers related to UARTi.
Note: SIM : Subscriber Identity Module
LSB first / MSB first selection
Continuous receive mode selection
CLK polarity selection
Transfer clock output from multiple
pins selection
Separate CTS/RTS pins
Serial data logic switch
Sleep mode selection
TxD, RxD I/O polarity switch
TxD, RxD port output format
Parity error signal output
Bus collision detection
16
, 03A8
16
Function
and 0378
16
) determine whether UARTi is used as a clock synchronous serial I/O or as a
Possible
Possible
Possible
Impossible
Possible
Impossible
Possible
Impossible
CMOS output
Impossible
Impossible
UART0
(Note 1)
(Note 1)
(Note 3)
(Note 1)
Possible
Possible
Possible
Impossible
Impossible
Possible
Impossible
CMOS output
Impossible
Impossible
Possible
UART1
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
(Note 1)
(Note 1)
(Note 1)
(Note 1)
(Note 3)
N-channel open-drain
output
Possible
Possible
Possible
Impossible
Impossible
Possible
Impossible
Possible
Possible
Possible
Mitsubishi microcomputers
M16C / 62 Group
UART2
(Note 4)
(Note 4)
(Note 1)
(Note 2)
(Note 1)

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