M30622M4 MITSUBISHI [Mitsubishi Electric Semiconductor], M30622M4 Datasheet - Page 143
M30622M4
Manufacturer Part Number
M30622M4
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Manufacturer
MITSUBISHI [Mitsubishi Electric Semiconductor]
Datasheet
1.M30622M4.pdf
(276 pages)
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UART2 Special Mode Register
Figure 1.19.28. Some other functions added
Some other functions added are explained here. Figure 1.19.28 shows their workings.
Bit 4 of the UART2 special mode register is used as the bus collision detect sampling clock select bit. The
bus collision detect interrupt occurs when the RxD
mity is detected in synchronization with the rising edge of the transfer clock signal if the bit is set to “0”. If
this bit is set to “1”, the nonconformity is detected at the timing of the overflow of timer A0 rather than at
the rising edge of the transfer clock.
Bit 5 of the UART2 special mode register is used as the auto clear function select bit of transmit enable
bit. Setting this bit to “1” automatically resets the transmit enable bit to “0” when “1” is set in the bus
collision detect interrupt request bit (nonconformity).
Bit 6 of the UART2 special mode register is used as the transmit start condition select bit. Setting this bit
to “1” starts the TxD transmission in synchronization with the falling edge of the RxD terminal.
1. Bus collision detect sampling clock select bit (Bit 4 of the UART2 special mode register)
2. Auto clear function select bit of transmt enable bit (Bit 5 of the UART2 special mode register)
3. Transmit start condition select bit (Bit 6 of the UART2 special mode register)
TxD/RxD
With "1: falling edge of RxD
CLK
Timer A0
0: In normal state
CLK
TxD/RxD
Bus collision
detect interrupt
request bit
Transmit
enable bit
CLK
TxD
RxD
CLK
TxD
Enabling transmission
0: Rising edges of the transfer clock
2
" selected
2
level and TxD
2
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
level do not match, but the nonconfor-
1: Timer A0 overflow
Mitsubishi microcomputers
M16C / 62 Group
143
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