M30622MA-XXXFP RENESAS [Renesas Technology Corp], M30622MA-XXXFP Datasheet - Page 194

• Manufacturer Part Number: M30622MA-XXXFP
• Description: 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY
• Manufacturer: RENESAS [Renesas Technology Corp]

Usage precaution
Noise
(4) External interrupt
(5) Rewrite the interrupt control register
(1) V
(2) Insert bypass capacitor between V
Note 1: Inserting a 5 K ohm resistor will not cause any problem when switching to mask ROM version.
PP
• When the polarity of the INT0 to INT5 pins is changed, the interrupt request bit is sometimes set
• To rewrite the interrupt control register, do so at a point that does not generate the interrupt
• When a instruction to rewrite the interrupt control register is executed but the interrupt is disabled,
• V
• Insert bypass capacitor (about 0.1 F) and connect short and wide line between V
to "1". After changing the polarity, set the interrupt request bit to "0".
request for that register. If there is possibility of the interrupt request occur, rewrite the interrupt
control register after the interrupt is disabled. The program examples are described as follow:
the interrupt request bit is not set sometimes even if the interrupt request for that register has
been generated. This will depend on the instruction. If this creates problems, use the below in-
structions to change the register.
Instructions : AND, OR, BCLR, BSET
with one-time PROM version or EPROM version. So CNV
ment of noise resistance. If CNV
resistor close to CNV
lines.
line of one-time PROM version or EPROM version
PP
Example 1:
Example 2:
Example 3:
The reason why two NOP instructions (four when using the HOLD function) or dummy read are inserted
before FSET I in Examples 1 and 2 is to prevent the interrupt enable flag I from being set before the
interrupt control register is rewritten due to effects of the instruction queue.
(This line is for PROM programming power line) line of internal PROM connected to CNV
INT_SWITCH1:
INT_SWITCH2:
INT_SWITCH3:
FCLR
AND.B
NOP
NOP
FSET
FCLR
AND.B
MOV.W MEM, R0
FSET
PUSHC FLG
FCLR
AND.B
POPC
I
#00h, 0055h ; Clear TA0IC int. priority level and int. request bit.
I
I
#00h, 0055h ; Clear TA0IC int. priority level and int. request bit.
I
I
#00h, 0055h ; Clear TA0IC int. priority level and int. request bit.
FLG
SS
pin and connect to V
_______
CC
; Disable interrupts.
; Four NOP instructions are required when using HOLD function.
; Enable interrupts.
; Disable interrupts.
; Dummy read.
; Enable interrupts.
; Push Flag register onto stack
; Disable interrupts.
; Enable interrupts.
_______
and V
SS
line is long, you should insert an approximately 5K ohm
SS
pin for noise and latch up countermeasure.
SS
or V
CC
.
SS
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
should be a short line for improve-
Mitsubishi microcomputers
M16C / 62 Group
CC
and V
SS
SS
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