M30622MA-XXXFP RENESAS [Renesas Technology Corp], M30622MA-XXXFP Datasheet - Page 357

• Manufacturer Part Number: M30622MA-XXXFP
• Description: 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY
• Manufacturer: RENESAS [Renesas Technology Corp]

Clock-Synchronous Serial I/O
342
Operation (1) Writing dummy data to the UARTi transmit buffer register, setting the receive enable bit to “1”,
2.4.4 Operation of Serial I/O (reception in clock-synchronous serial I/O mode)
In receiving data in clock-synchronous serial I/O mode, choose functions from those listed in Table 2.4.3.
Operations of the circled items are described below. Figure 2.4.13 shows the operation timing, and Fig-
ures 2.4.14 and 2.4.15 show the set-up procedures.
Table 2.4.3. Choosed functions
(2) In synchronization with the first rising edge of the transfer clock, the input signal to the RxDi
(3) When 1-byte data lines up in the UARTi receive register, the content of the UARTi receive
(4) The receive complete flag goes to “0” when the lower-order byte of the UARTi buffer register
Note 1: This can be selected only when UART1 is used in combination with the internal clock. When this function is
Note 2: UART0 only. (UART1 CTS/RTS function cannot be used when this function is selected.)
Note 3: UART2 only.
Transfer clock
source
RTS function
CLK polarity
Transfer clock
and the transmit enable bit to “1”, makes the data receivable status ready. At this time, the
output from the RTSi pin goes to “L” level, which informs the transmission side that the data
receivable status is ready (output the transfer clock from the IC on the transmission side after
checking that the RTS output has gone to “L” level).
pin is stored in the highest bit of the UARTi receive register. Then, data is taken in by shifting
right the content of the UARTi reception data in synchronization with the rising edges of the
transfer clock.
register is transmitted to the UARTi receive buffer register. The transfer clock stops at “H”
level. At this time, the receive complete flag and the UARTi receive interrupt request bit goes
to “1”.
is read.
selected, neither UART1 CTS/RTS function, nor UART0 CTS/RTS separation function can be utilized. Set the
UART1 CTS/RTS disable bit to “1”.
Item
_______ _______
________
O
O
O
O
_______
External clock (CLKi pin)
LSB first
Internal clock (f
RTS function enabled
RTS function disabled
Input reception data at
the rising edge of the
transfer clock
MSB first
Input reception data at
the falling edge of the
transfer clock
_______ _______
_______ _______
Set-up
1
/ f
8
/ f
32
)
Continuous receive
mode
Output transfer clock
to multiple pins
(Note 1)
CTS / RTS
separation function
(Note 2)
Data logic select
function
(Note 3)
T
polarity reverse bit
(Note 3)
X
D, R
_______ _______
X
Item
D I/O
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
O
O
O
O
O
Disabled
Enabled
Not selected
No reverse
No reverse
Selected
Pin shared by CTS and RTS
CTS and RTS separated
Reverse
Reverse
Mitsubishi microcomputers
M16C / 62 Group
Set-up