M30622MA-XXXFP RENESAS [Renesas Technology Corp], M30622MA-XXXFP Datasheet - Page 503

• Manufacturer Part Number: M30622MA-XXXFP
• Description: 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY
• Manufacturer: RENESAS [Renesas Technology Corp]

Interrupt
488
4.1.3 Hardware Interrupts
Hardware interrupts are classified into two types — special interrupts and peripheral I/O interrupts.
(1) Special interrupts
(2) Peripheral I/O interrupts
Special interrupts are non-maskable interrupts.
• Reset
• NMI interrupt
• DBC interrupt
• Watchdog timer interrupt
• Single-step interrupt
• Address match interrupt
A peripheral I/O interrupt is generated by one of built-in peripheral functions. Built-in peripheral func-
tions are dependent on classes of products, so the interrupt factors too are dependent on classes of
products. The interrupt vector table is the same as the one for software interrupt numbers 0 through
31 the INI instruction uses. Peripheral I/O interrupts are maskable interrupts.
• Bus collision detection interrupt
• DMA0 interrupt, DMA1 interrupt
• Key-input interrupt
• A-D conversion interrupt
• UART0, UART1 and UART2 transmission interrupt
• UART0, UART1 and UART2 reception interrupt
• Timer A0 interrupt through timer A4 interrupt
• Timer B0 interrupt through timer B2 interrupt
• INT0 interrupt through INT2 interrupt
Reset occurs if an “L” is input to the RESET pin.
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An NMI interrupt occurs if an “L” is input to the NMI pin.
This interrupt is exclusively for the debugger, do not use it in other circumstances.
Generated by the watchdog timer.
This interrupt is exclusively for the debugger, do not use it in other circumstances. With the debug
flag (D flag) set to “1”, a single-step interrupt occurs after one instruction is executed.
An address match interrupt occurs immediately before the instruction held in the address indicated by
the address match interrupt register is executed with the address match interrupt enable bit set to “1”.
If an address other than the first address of the instruction in the address match interrupt register is set,
no address match interrupt occurs. For address match interrupt, see 2.11 Address match Interrupt.
This is an interrupt that the serial I/O bus collision detection generates.
These are interrupts DMA generates.
A key-input interrupt occurs if an “L” is input to the KI pin.
This is an interrupt that the A-D converter generates.
These are interrupts that the serial I/O transmission generates.
These are interrupts that the serial I/O reception generates.
These are interrupts that timer A generates
These are interrupts that timer B generates.
An INT interrupt occurs if either a rising edge or a falling edge is input to the INT pin.
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SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
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Mitsubishi microcomputers
M16C / 62 Group