M30622MA-XXXFP RENESAS [Renesas Technology Corp], M30622MA-XXXFP Datasheet - Page 545

• Manufacturer Part Number: M30622MA-XXXFP
• Description: 16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY
• Manufacturer: RENESAS [Renesas Technology Corp]

External Buses
530
5.5 Connectable Memories
5.5.1 Operation Frequency and Access Time
Connectable memories depend upon the BCLK frequency f(BCLK). The frequency of f(BCLK) is equal to
that of the BCLK , and is contingent on the oscillator's frequency and on the settings in the system clock
select bits (bit 6 of address 0006
The following are the conditional equations for the connections. Meet these conditions minimally. Fig-
ures 5.5.1 and 5.5.2 show the relation between the frequency of BCLK and memory.
(1) Read cycle time (tCR)/write cycle time (tCW)
(2) Address access time [ta(A)]
(3) Chip select access time [ta(S)]
Read cycle time (tCR) and write cycle time (tCW) must satisfy the following conditional expressions:
• With the Wait option cleared
• With the Wait option selected
Address access time [ta(A)] must satisfy the following conditional expressions:
(a) Vcc = 5V
• With the Wait option cleared
• With the Wait option selected
(b) Vcc = 3V
• With the Wait option cleared
• With the Wait option selected
Chip select access time [ta(S)] must satisfy the following conditional expressions:
(a) Vcc = 5V
• With the Wait option cleared
• With the Wait option selected
tCR < 10
tCR < 2 X 10
ta(A) < 10
ta(A) < 2 X 10
ta(A) < 10
ta(A) < 2 X10
ta(S) < 10
ta(S) < 2 X10
* 65(ns)
* 140(ns) = td(BCLK-AD) + tsu(DB – RD) – th(BCLK – RD)
* 65(ns)
9
/f(BCLK) and tCW < 10
9
9
9
/f(BCLK) – 65(ns)*
/f(BCLK) – 140(ns)*
/f(BCLK) – 65(ns)*
= td(BCLK – AD) + tsu(DB – RD) – th(BCLK – RD)
= (address output delay time) + (data input setup time) – (RD signal output hold time)
= (address output delay time) + (data input setup time) – (RD signal output hold time)
= td(BCLK – CS) + tsu(DB – RD) – th(BCLK – RD)
= (chip select output delay time) + (data input setup time) – (RD signal output hold time)
9
9
9
/f(BCLK) and tCW < 2 X 10
9
/f(BCLK) – 140(ns)*
/f(BCLK) – 65(ns)*
/f(BCLK) – 65(ns)*
16
, and bits 6 and 7 of address 0007
9
/f(BCLK)
9
/f(BCLK)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
16
).
Mitsubishi microcomputers
M16C / 62 Group