M30622MA-XXXFP RENESAS [Renesas Technology Corp], M30622MA-XXXFP Datasheet - Page 549

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M30622MA-XXXFP

Manufacturer Part Number
M30622MA-XXXFP
Description
16-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
External Buses
534
Figure 5.5.3. Relation of processor mode and the wait bit (PM17, CSiW) (1)
5.5.2 Connecting Low-Speed Memory
To connect memory with long access time [ta(A)], either decrease the frequency of BCLK or set a soft-
ware wait. Using the RDY feature allows you to connect memory having the timing that precludes con-
nection though you set software wait.
(1) Using software wait
In case of M30620MA
FFFFF
Set software wait by using either of bit 7 (PM17) of processor mode register 1 or bits 4 through 7
(CS0W through CS3W) of the chip select control register. With software wait set, if an address space
is accessed in which a separate bus is selected, the bus cycle results in two cycles of BCLK; if an
address space is accessed in which a multiplex bus is selected, the bus cycle results in three cycles of
BCLK.
If bit 7 (PM17) of processor mode register 1 is set to “Wait selected”, the microcomputer accesses
every area with this option in effect. If bit 7 (PM17) of processor mode register 1 is set to “Wait
cleared”, the Wait option can be either selected or cleared, chip select by chip select, by setting bits
4 through 7 (CS0W through CS3W) of the chip select control register. Figures 5.5.3 through 5.5.5
show relation of processor mode and the wait bit (PM17, CSiW).
02C00
E8000
00000
00400
16
16
16
16
16
(When, PM17 = “0”)
Single-chip mode
Internal ROM area
Internal RAM area
SFR area
________
BCLK X 2
BCLK X 1
BCLK X 1
FFFFF
02C00
E8000
00000
00400
16
16
16
16
16
(When, PM17 = “1”)
Single-chip mode
Internal ROM area
Internal RAM area
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
SFR area
Mitsubishi microcomputers
M16C / 62 Group
BCLK X 2
BCLK X 2
BCLK X 2

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