M30622SAFP MITSUBISHI [Mitsubishi Electric Semiconductor], M30622SAFP Datasheet - Page 135

• Manufacturer Part Number: M30622SAFP
• Description: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
• Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]

UART2 Special Mode Register
Figure 1.16.26. UART2 special mode register
UART2 Special Mode Register
The UART2 special mode register (address 0377
Figure 1.16.26 shows the UART2 special mode register.
Bit 0 of the UART special mode register (0377
Setting “1” in the I
interface effective.
Table 1.16.9 shows the relation between the I
Since this function uses clock-synchronous serial I/O mode, set this bit to “0” in UART mode.
UART2 special mode register 3 (I C bus exclusive use register)
b7 b6 b5 b4 b3 b2 b1 b0
Note 1: This bit can be read or written to when UART2 special mode register (U2SMR at address 0377
Note 2: These bits are initialized to “000” when SDDS = “0”, with the analog delay circuit selected. After a reset,
Note 3: When analog delay is selected, only the analog delay value is effective; when digital delay is selected,
Note 4: The amount of delay varies with the load on SCL and SDA pins. Also, when using an external clock, the
UART2 special mode register
b7 b6 b5 b4 b3 b2 b1 b0
7 (SDDS: SDA digital delay select bit) = “1”. When the initial value of UART2 special mode register 3
(U2SMR3) is read after setting SDDS = “1”, the value is “00
register 3 (U2SMR3) after setting SDDS = “1”, be sure to write 0's to bits 0–4. When SDDS = “0”,
this register cannot be written to; when read, the value is indeterminate.
these bits are set to “000”, with the analog delay circuit selected. However, because these bits can be
read only when SDDS = “1”, the value read from these bits when SDDS = “0” is indeterminate.
only the digital delay value is effective.
amount of delay increases by about 100 ns, so be sure to take this into account when using the device.
2
C mode select bit (bit 0) goes the circuit to achieve the I
Note 1: Nothing but “0” may be written.
Note 2: When not in I 2 C mode, do not set this bit by writing a “1”. During normal mode, fix it to “0”. When this
Note 3: When analog delay is selected, only the analog delay value is effective; when digital delay is selected,
ABSCS
DL0
DL1
DL2
ACSE
symbol
SSS
SDDS
symbol
Nothing is assigned.
In an attempt to write to these bits, write “0”. The value, if read, turns out to be
indeterminate. However, when SDDS = “1”, the value “0” is read out (Note 1)
LSYN
IICM
ABC
BBS
Bit
Bit
bit = “0”, UART2 special mode register 3 (U2SMR3 at address 0375
digital delay setup bits) are initialized to “000”, with the analog delay circuit selected. Also, when SDDS
only the digital delay value is effective.
Symbol
U2SMR
= “0”, the U2SMR3 register cannot be read or written to.
Symbol
U2SMR3
I 2 C mode select bit
Arbitration lost detecting
flag control bit
Bus busy flag
Bus collision detect
sampling
clock select bit
Auto clear function
select bit of transmit
enable bit
Transmit start condition
select bit
SDA digital delay select
bit (Note 2, Note 3)
SCLL sync output
enable bit
SDA digital delay setup
bit
(Note 1, Note 2, Note 3,
Note 4)
2
Bit name
name
Bit
Address
0377
Address
0375
16
0 : Analog delay output
1 : Digital delay output
(must always be “0” when
(During clock synchronous
0 : Normal mode
1 : IIC mode
0 : Update per bit
1 : Update per byte
0 : STOP condition detected
1 : START condition detected
0 : Disabled
1 : Enabled
Must always be “0”
Must always be “0”
Must always be “0”
16
not using I C mode)
b7 b6 b5
2
0 0 0 : Analog delay is selected
0 0 1 : 2 cycle of 1/f(X
0 1 0 : 3 cycle of 1/f(X
0 1 1 : 4 cycle of 1/f(X
1 0 0 : 5 cycle of 1/f(X
1 0 1 : 6 cycle of 1/f(X
1 1 0 : 7 cycle of 1/f(X
1 1 1 : 8 cycle of 1/f(X
is selected
is selected
16
C mode select bit and respective control workings.
serial I/O mode)
When reset
) is used as the I
(However, when SDDS = “1”, the initial value is “00
Indeterminate
Function
16
When reset
00
2
16
) is used to control UART2 in various ways.
(I C bus exclusive use register)
16
2
”. When writing to UART2 special mode
Function
IN
IN
IN
IN
IN
IN
IN
0 : Rising edge of transfer
1 : Under flow signal of timer A0
0 : Ordinary
1 : Falling edge of RxD2
0 : No auto clear function
1 : Auto clear at occurrence of
Must always be “0”
Must always be “0”
Must always be “0”
Must always be “0”
Must always be “0”
)
)
)
)
)
)
)
clock
bus collision
(During UART mode)
Digital delay is
selected
16
2
Function
) bits 7 to 5 (DL2 to DL0 = SDA
C mode select bit.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
16
) bit
R
(Note1)
2
R
16
C bus (simplified I
”)
W
W
M16C / 62A Group
Mitsubishi microcomputers
2
C bus)
135