M30622SAFP MITSUBISHI [Mitsubishi Electric Semiconductor], M30622SAFP Datasheet - Page 64

• Manufacturer Part Number: M30622SAFP
• Description: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
• Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]

Watchdog Timer
64
Watchdog Timer
With X
Watchdog timer period =
With X
Watchdog timer period =
Figure 1.12.1. Block diagram of watchdog timer
The watchdog timer has the function of detecting when the program is out of control. The watchdog timer is
a 15-bit counter which down-counts the clock derived by dividing the BCLK using the prescaler. A watchdog
timer interrupt is generated when an underflow occurs in the watchdog timer. When X
BCLK bit 7 of the watchdog timer control register (address 000F
16 or by 128). When X
of the watchdog timer control register (address 000F
lated as given below. The watchdog timer's period is, however, subject to an error due to the prescaler.
For example, suppose that BCLK runs at 16 MHz and that 16 has been chosen for the dividing ratio of the
prescaler, then the watchdog timer's period becomes approximately 32.8 ms.
The watchdog timer is initialized by writing to the watchdog timer start register (address 000E
a watchdog timer interrupt request is generated. The prescaler is initialized only when the microcomputer is
reset. After a reset is cancelled, the watchdog timer and prescaler are both stopped. The count is started by
writing to the watchdog timer start register (address 000E
Figure 1.12.1 shows the block diagram of the watchdog timer. Figure 1.12.2 shows the watchdog timer-
related registers.
Write to the watchdog timer
start register
(address 000E
IN
CIN
RESET
chosen for BCLK
HOLD
BCLK
chosen for BCLK
16
)
CIN
is selected as the BCLK, the prescaler is set for division by 2 regardless of bit 7
prescaler dividing ratio (16 or 128) X watchdog timer count (32768)
prescaler dividing ratio (2) X watchdog timer count (32768)
Prescaler
1/128
1/16
1/2
“CM07 = 0”
“WDC7 = 0”
“CM07 = 0”
“WDC7 = 1”
“CM07 = 1”
16
). Thus the watchdog timer's period can be calcu-
BCLK
16
).
BCLK
16
Watchdog timer
) selects the prescaler division ratio (by
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Set to
“7FFF
16
”
IN
M16C / 62A Group
Mitsubishi microcomputers
is selected for the
Watchdog timer
interrupt request
16
) and when