M34282E2GP

Manufacturer Part NumberM34282E2GP
DescriptionSINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
ManufacturerMITSUBISHI [Mitsubishi Electric Semiconductor]
M34282E2GP datasheets
 


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DESCRIPTION
The 4282 Group enables fabrication of 8
the followin timers;
• an 8-bit timer which can be used to set each carrier wave and
has two reload register
• an 8-bit timer which can be used to auto-control and has a
reload register.
FEATURES
• Number of basic instructions ............................................. 68
• Minimum instruction execution time ............................ 8.0 s
(at f(X
) = 4.0 MHz, system clock = f(X
IN
• Supply voltage ................................................. 1.8 V to 3.6 V
• Subroutine nesting ..................................................... 4 levels
ROM (PROM) size
Product
M34282M1-XXXGP
1024 words
M34282M2-XXXGP
2048 words
M34282E2GP
2048 words
PIN CONFIGURATION (TOP VIEW)
V
S S
E
2
E
1
X
IN
X
O U T
E
0
G
0
G
1
G
2
G
3
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
• Timer
Timer 1 ................................................................... 8-bit timer
7 key matrix and has
(This has a reload register and carrier wave output auto-control
function)
Timer 2 ................................................................... 8-bit timer
(This has two reload registers and carrier wave output function)
• Logic operation function (XOR, OR, AND)
• RAM back-up function
• Key-on wakeup function (ports D
• I/O port (ports D, E, G, CARR) .......................................... 16
• Oscillation circuit ..................................... Ceramic resonance
• Watchdog timer
)/8)
IN
• Power-on reset circuit
• Voltage drop detection circuit ......................... Typical:1.50 V
(system reset)
APPLICATION
Various remote control transmitters
RAM size
( 9 bits)
( 4 bits)
48 words
64 words
64 words
1
20
2
1 9
3
18
4
17
5
1 6
6
15
1 4
7
1 3
8
1 2
9
1 1
10
Outline 20P2E/F-A
MITSUBISHI MICROCOMPUTERS
4282 Group
–D
, E
–E
, G
–G
) .... 11
4
7
0
2
0
3
Package
ROM type
20P2E/F-A
Mask ROM
20P2E/F-A
Mask ROM
20P2E/F-A
One Time PROM
V
DD
CARR
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7

M34282E2GP Summary of contents

  • Page 1

    ... Number of basic instructions ............................................. 68 • Minimum instruction execution time ............................ 8.0 s (at f 4.0 MHz, system clock = f(X IN • Supply voltage ................................................. 1 3.6 V • Subroutine nesting ..................................................... 4 levels ROM (PROM) size Product M34282M1-XXXGP 1024 words M34282M2-XXXGP 2048 words M34282E2GP 2048 words PIN CONFIGURATION (TOP VIEW ...

  • Page 2

    BLOCK DIAGRAM 2 MITSUBISHI MICROCOMPUTERS SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER MITSUBISHI ELECTRIC 4282 Group ...

  • Page 3

    PERFORMANCE OVERVIEW Parameter Number of basic instructions 68 Minimum instruction execution time 8.0 s (f(X Memory sizes ROM 2048 words M34282M2/E2 1024 words M34282M1 RAM 64 words M34282M2/E2 48 words M34282M1 Input/Output Four independent output ports D –D Output 0 ...

  • Page 4

    CONNECTIONS OF UNUSED PINS Pin Connection Open or connect – Set the output latch to “1” and open connect to V pin (Note 2). DD Open or connect to ...

  • Page 5

    PORT BLOCK DIAGRAMS Register Y Decoder SD instruction RD instruction CLD instruction Register Y Decoder SD instruction RD instruction CLD instruction Skip decision (SZD instruction) Key-on wakeup Register IAE instruction (Note 3) OEA T instruction ...

  • Page 6

    FUNCTION BLOCK OPERATIONS CPU (1) Arithmetic logic unit (ALU) The arithmetic logic unit ALU performs 4-bit arithmetic such as 4-bit data addition, comparison, and bit manipulation. (2) Register A and carry flag Register 4-bit register used for ...

  • Page 7

    Most significant ROM code reference enable flag (URS) URS flag controls whether to refer to the contents of the most significant 1 bit (bit 8) of ROM code when executing the TABP p instruction. If URS flag is “0,” ...

  • Page 8

    Program counter (PC) Program counter (PC) is used to specify a ROM address (page and address). It determines a sequence in which instructions stored in ROM are read binary counter that increments the number of instruction ...

  • Page 9

    PROGRAM MEMORY (ROM) The program memory is a mask ROM. 1 word of ROM is composed of 9 bits. ROM is separated every 128 words by the unit of page (addresses 0 to 127). Table 1 ROM size and pages ...

  • Page 10

    TIMERS The 4282 Group has the programmable timer. • Programmable timer The programmable timer has a reload register and enables the frequency dividing ratio to be set decremented from a setting value n. When it underflows (count to ...

  • Page 11

    V1 (Note CARRY 1 1 Reload register R1 (8) (T1AB) (TAB1) Register (Note 1/2 1 (TAB2) CAR flag SCAR instruction S Q RCAR ...

  • Page 12

    Table 4 Control registers related to timer Timer control register V1 V1 Carrier wave output auto-control bit 2 V1 Timer 1 count source selection bit 1 V1 Timer 1 control bit 0 Timer control register V1 V1 Carrier wave “H” ...

  • Page 13

    Timer 1 Timer 8-bit binary down counter with the timer 1 reload register (R1). When timer is stopped, data can be set simultaneously in timer 1 and the reload register (R1) with the T1AB instruction. When ...

  • Page 14

    “1” “0” “ H ” Port CARR output “L” ...

  • Page 15

    In this case, the following is set; • To expand “H” interval of carrier wave is invalid (V2 • Timer 2 carrier wave generation function is valid (V2 • Count source X /2 selected (V2 IN • “L” interval (03 ...

  • Page 16

    WATCHDOG TIMER Watchdog timer provides a method to reset and restart the system when a program runs wild. Watchdog timer consists of 14-bit timer (WDT) and watchdog timer flags (WDF1, WDF2). Watchdog timer downcounts the instruction clock (INSTCK) as the ...

  • Page 17

    RESET FUNCTION The 4282 Group has the power-on reset circuit, though it does not have RESET pin. System reset is performed automatically at power-on, and software starts program from address 0 in page 0. f “H” Internal reset ...

  • Page 18

    Internal state at reset Table 6 shows port state at reset, and Figure 20 shows internal state at reset (they are retained after system is released from reset). • Program counter (PC) .............................................................. Address 0 in page 0 is ...

  • Page 19

    RAM BACK-UP MODE The 4282 Group has the RAM back-up mode. When the POF instruction is executed, system enters the RAM back-up state. As oscillation stops retaining RAM, the functions and states of reset circuit at RAM back-up mode, power ...

  • Page 20

    Return signal An external wakeup signal is used to return from the RAM back-up mode. Table 8 shows the return condition for each return source. Table 8 Return source and return condition Return source Return condition Ports D –D ...

  • Page 21

    CLOCK CONTROL The clock control circuit consists of the following circuits. • System clock generating circuit • Control circuit to stop the clock oscillation • Control circuit to return from the RAM back-up state ...

  • Page 22

    LIST OF PRECAUTIONS Noise and latch-up prevention Connect a capacitor on the following condition to prevent noise and latch-up; • connect a bypass capacitor (approx. 0.01 F) between pins V and V at the shortest distance • equalize ...

  • Page 23

    INSTRUCTIONS The 4282 Group has the 68 instructions. Each instruction is described as follows; (1) List of instruction function (2) Machine instructions (index by alphabet) (3) Machine instructions (index by function) (4) Instruction code table SYMBOL The symbols shown below ...

  • Page 24

    LIST OF INSTRUCTION FUNCTION Mnemonic Function Groupi n g TAB (A) (B) TBA (B) (A) TAY (A) (Y) TYA (Y) (A) TEAB (ER – (ER – TABE (B) (ER – ...

  • Page 25

    Grouping Mnemonic Function (A) = (M(DP)) ? SEAM ( SEA ( – ( ( –a L ...

  • Page 26

    LIST OF INSTRUCTION FUNCTION (CONTINUED) Groupi n g Function Mnemonic CLD (D) 0 (D(Y ( (D(Y SZD (D(Y ( OEA ...

  • Page 27

    MACHINE INSTRUCTIONS (INDEX BY ALPHABET (Add n and accumulator) Instrunction D 8 code Operation: (A) ( (Add accumulator and Memory) Instrunction D 8 ...

  • Page 28

    BA a (Branch to address a + Accumulator) Instrunction D 8 code Operation: ( – – ...

  • Page 29

    BML p, a (Branch and Mark Long to address a in page p) Instrunction D 8 code Operation: (SK(SP)) (PC) (SP) (SP) + ...

  • Page 30

    CMA (CoMplement of Accumulator) Instrunction D 8 code Operation: (A) (A) DEY (DEcrement register Y) Instrunction D 8 code Operation: (Y) (Y) – 1 IAE (Input Accumulator from ...

  • Page 31

    INY (INcrement register Y) Instrunction D 8 code Operation: (Y) ( (Load n in Accumulator) Instrunction D 8 code Operation: ( ...

  • Page 32

    NOP (No OPeration) Instrunction D 8 code Operation: (PC) (PC OEA (Output port E from Accumulator) Instrunction D 8 code Operation ...

  • Page 33

    RAR (Rotate Accumulator Right) Instrunction D 8 code Operation (Reset Bit) Instrunction D 8 code Operation: (Mj(DP)) ...

  • Page 34

    RD (Reset port D specified by register Y) Instrunction D 8 code Operation: (D(Y)) 0 However, ( (ReTurn from subroutine) Instrunction D 8 code ...

  • Page 35

    SC (Set Carry flag) Instrunction D 8 code Operation: (CY) 1 SCAR (Set CAR flag) Instrunction D 8 code Operation: (CAR (Set port D specified by ...

  • Page 36

    SEAM (Skip Equal, Accumulator with Memory) Instrunction D 8 code Operation: (A) = (M(DP)) ? SNZP (Skip if Non Zero condition of Power down flag) Instrunction D 8 code ...

  • Page 37

    SZB j (Skip if Zero, Bit) Instrunction D 8 code Operation: (Mj(DP SZC (Skip if Zero, Carry flag) Instrunction D 8 code ...

  • Page 38

    T2AB (Transfer data to timer 2 and register R2L from Accumulator and register B) Instrunction D 8 code Operation: (R2L –R2L ) ( (R2L –R2L ) ( (T2 –T2 ) ...

  • Page 39

    TAB1 (Transfer data to Accumulator and register B from timer 1) Instrunction D 8 code Operation: (B) (T1 – (A) (T1 – TAB2 (Transfer data to Accumulator and ...

  • Page 40

    TAM j (Transfer data to Accumulator from Memory) Instrunction D 8 code Operation: (A) (M(DP)) (X) (X)EXOR( TAY (Transfer data to Accumulator from register Y) Instrunction D 8 code ...

  • Page 41

    TEAB (Transfer data to register E from Accumulator and register B) Instrunction D 8 code Operation: (ER – (ER – TLOA (Transfer data to register LO ...

  • Page 42

    TV1A (Transfer data to register V1 from Accumulator) Instrunction D 8 code Operation: (V1 – – TV2A (Transfer data to register V2 from Accumulator) Instrunction D 8 ...

  • Page 43

    WRST (Watchdog timer ReSeT) Instrunction D 8 code Operation: (WDF1) 0 XAM j (eXchange Accumulator and Memory data) Instrunction D 8 code Operation: (A) (M(DP)) (X) (X)EXOR(j) j ...

  • Page 44

    MACHINE INSTRUCTIONS (INDEX BY FUNCTION) Parameter Mnemonic instructions TAB TBA TAY ...

  • Page 45

    Skip condition – – Transfers the contents of register B to register A. – – Transfers the contents of register A to register B. – – Transfers the contents of register Y to register A. – – Transfers the contents ...

  • Page 46

    MACHINE INSTRUCTIONS (CONTINUED) Parameter Mnemonic instructions TABP ...

  • Page 47

    Skip condition Continuous – Loads the value n in the immediate field to register A. description When the LA instructions are continuously coded and executed, only the first LA instruction is executed and other LA instructions coded continuously are skipped. ...

  • Page 48

    MACHINE INSTRUCTIONS (CONTINUED) Parameter Mnemonic instructions SZB ...

  • Page 49

    Skip condition – – Sets (1) the contents of bit j (bit specified by the value j in the immediate field) of M(DP). – – Clears (0) the contents of bit j (bit specified by the value j in the ...

  • Page 50

    MACHINE INSTRUCTIONS (CONTINUED) Parameter Mnemonic instructions BML ...

  • Page 51

    Skip condition – – Call the subroutine in page 2 : Calls the subroutine at address a in page 2. – – Call the subroutine : Calls the subroutine at address a in page p. – – Call the subroutine ...

  • Page 52

    MACHINE INSTRUCTIONS (CONTINUED) Parameter Mnemonic instructions TAB2 TV2A SNZT2 0 ...

  • Page 53

    Skip condition – – Transfers the contents of timer 2 to registers A and B. – – Transfers the contents of register A to registers V2. (T2F – Skips the next instruction when the contents of T2F flag ...

  • Page 54

    Parameter Mnemonic instructions NOP POF SNZP CCK ...

  • Page 55

    Skip condition – – No operation – – Puts the system in RAM back-up state. ( – Skips the next instruction when P flag is “1.” After skipping, P flag remains unchanged. – – System clock (STCK) changes ...

  • Page 56

    INSTRUCTION CODE TABLE 00000 00001 00010 00011 00100 00101 00110 00111 01000 01001 01010 01011 01100 01101 01110 01111 D – – 3 Hex notation SZB NOP BLA BL 0 0000 ...

  • Page 57

    REGISTER STRUCTURE Timer control register V1 V1 Carrier wave output auto-control bit 2 V1 Timer 1 count source selection bit 1 V1 Timer 1 control bit 0 Timer control register V1 V1 Carrier wave “H” interval expansion bit 3 V1 ...

  • Page 58

    ABSOLUTE MAXIMUM RATINGS Symbol Parameter V Supply voltage DD V Input voltage I V Output voltage O P Power dissipation d T Operating temperature range opr T Storage temperature range stg RECOMMENDED OPERATING CONDITIONS (Ta = – ...

  • Page 59

    ELECTRICAL CHARACTERISTICS (Ta = – unless otherwise noted) DD Symbol Parameter V “L” level output voltage Port CARR OL V “L” level output voltage X OL OUT V “H” level output voltage ...

  • Page 60

    ... The built-in PROM version has functions similar to those of the mask ROM versions, but it has PROM mode that enables writing to built-in PROM. Table 10 Product of built-in PROM version PROM size Product ( 9 bits) M34282E2GP 2048 words PIN CONFIGURATION (TOP VIEW ...

  • Page 61

    ... PROM mode (serial input/output) The M34282E2GP has a PROM mode in addition to a normal operation mode. It has a function to serially input/output the command codes, addresses, and data required for operation (e.g., read and program) on the built-in PROM using only a few pins. This mode can be selected by setting pins SDA (serial data input/output), SCLK (serial clock input), PGM and V “ ...

  • Page 62

    Functional outline In the PROM mode, data is transferred with the clock- synchronous serial input/output. The input data is read through the SDA pin into the internal circuit synchronously with the rising edge of the serial clock pulse. The ...

  • Page 63

    Program Input command code 25 in the first transfer. Proceed and 16 input the low-order 8 bits and high-order 8 bits of the address and the low-order 8 bits and high-order 8 bits of program data SCLK ...

  • Page 64

    PROGRAM ALGORITHM FLOW CHART 64 SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER START 4V,V = 12. ADRS = first location X=0 WRITE PROGRAM-VERIFY COMMAND WRITE PROGRAM DATA PROGRAM ONE PULSE OF 0.2ms ...

  • Page 65

    TIMING REQUIREMENT CONDITION AND SWITCHING CHARACTERISTICS ( 4 12 Symbol Parameter t Serial transfer width time CH t Read wait time after transfer CR t Read pulse width WR ...

  • Page 66

    Notes on handling A high-voltage is used for writing. Take care that overvoltage is not applied. Take care especially at turning on the power. For the One Time PROM version, Mitsubishi Electric corp. does not perform PROM writing test ...

  • Page 67

    PACKAGE OUTLINE 20P2E/F-A EIAJ Package Code JEDEC Code SSOP20-P-225-0.65 – Detail G 1 SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER Weight(g) Lead Material 0.08 Alloy 42/Cu Alloy ...

  • Page 68

    SSOP) MARK SPECIFICATION FORM Please choose one of the marking types below (A, B), and enter the Mitsubishi IC catalog name and the special mark (if needed). A. Standard Mitsubishi Mark 20 11 Mitsubishi lot number (4-digit or ...

  • Page 69

    Keep safety first in your circuit designs! • Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead ...

  • Page 70

    REVISION DESCRIPTION LIST Rev. No. 1.0 First Edition 1.1 Page 12 (2) Precautions revised. Page 13 (3) Timer 1, (4) Timer 2 revised. Page 22 Timer revised. 1.2 Pages 7, 8, 14, 18, 21: Character fonts errors revised. 1.3 All ...