M34282E2GP MITSUBISHI [Mitsubishi Electric Semiconductor], M34282E2GP Datasheet - Page 16

• Manufacturer Part Number: M34282E2GP
• Description: SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
• Manufacturer: MITSUBISHI [Mitsubishi Electric Semiconductor]

WATCHDOG TIMER
Watchdog timer provides a method to reset and restart the system
when a program runs wild. Watchdog timer consists of 14-bit
timer (WDT) and watchdog timer flags (WDF1, WDF2).
Watchdog timer downcounts the instruction clock (INSTCK) as
the count source immediately after system is released from reset.
When the timer WDT count value becomes 0000
occurs, the WDF1 flag is set to “1.” Then, when the WRST
instruction is not executed before the timer WDT counts 16383,
WDF2 flag is set to “1” and internal reset signal is generated and
system reset is performed.
Execute the WRST instruction at period of 16383 machine cycle
or less to keep the microcomputer operation normal.
Timer WDT is also used for generation of oscillation stabilization
time. When system is returned from reset and from RAM back-
up mode by key-input, software starts after the stabilization
oscillation time until timer WDT downcounts to 3E00
Fig. 17 Watchdog timer function
16
Note: “W” represents write enabled.
LOGIC OPERATION FUNCTION
The 4282 Group has the 4-bit logic operation function. The logic
operation between the contents of register A and the low-order
4 bits of register E is performed and its result is stored in register
A.
Table 5 Logic operation selection register LO
LO
LO
1
0
Value of timer WDT
Logic operation selection register LO
W D F 1 f l a g
WDF2 flag
I n t e r n a l r e s e t s i g n a l
Logic operation selection bits
3 F F F
3 E 0 0
0 0 0 0
“ 0 ”
“0”
“L”
“1”
“ 1 ”
“H”
1 6
S y s t e m
r e s e t
1 6
1 6
S o f t w a r e s t a r t
instruction
execution
POF
16
and underflow
16
Return
Software start
LO
elapses.
0
0
1
1
1
LO
MITSUBISHI
ELECTRIC
0
1
0
1
0
at reset : 00
Exclusive logic OR operation (XOR)
OR operation (OR)
AND operation (AND)
Not available
Each logic operation can be selected by setting logic operation
selection register LO.
Set the contents of this register through register A with the TLOA
instruction. The logic operation selected by register LO is
executed with the LGOP instruction.
Table 5 shows the logic operation selection register LO.
instruction
2
execution
WRST
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
Logic operation function
MITSUBISHI MICROCOMPUTERS
at RAM back-up : 00
S y s t e m
r e s e t
S o f t w a r e s t a r t
4282 Group
2
W