X5043 XICOR [Xicor Inc.], X5043 Datasheet

no-image

X5043

Manufacturer Part Number
X5043
Description
CPU Supervisor with 4K SPI EEPROM
Manufacturer
XICOR [Xicor Inc.]
Datasheets

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
X5043
Manufacturer:
INTERSIL
Quantity:
1 099
Part Number:
X5043
Manufacturer:
XILINX
0
Part Number:
X5043
Manufacturer:
INTERSIL
Quantity:
20 000
Part Number:
X5043G
Manufacturer:
XICOM
Quantity:
20 000
Part Number:
X5043M8IZ
Manufacturer:
Intersil
Quantity:
80
Part Number:
X5043M8IZ-2.7A
Manufacturer:
INTERSIL
Quantity:
20 000
Company:
Part Number:
X5043M8IZ-2.7A
Quantity:
5 400
Part Number:
X5043P
Quantity:
2 722
Part Number:
X5043P
Manufacturer:
XICOR
Quantity:
20 000
Part Number:
X5043P
Manufacturer:
XICOR
Quantity:
100
Part Number:
X5043P-2.7
Manufacturer:
Intersil
Quantity:
7 950
Part Number:
X5043P-2.7
Manufacturer:
INTERSI
Quantity:
7 122
Part Number:
X5043P-4.5A
Manufacturer:
NS
Quantity:
5 928
Part Number:
X5043PI
Manufacturer:
Intersil
Quantity:
18 250
Part Number:
X5043PI
Manufacturer:
INTERSI
Quantity:
15 844
Part Number:
X5043PI-2.7
Manufacturer:
Intersil
Quantity:
20 000
Part Number:
X5043PI-2.7
Manufacturer:
INTERSIL
Quantity:
20 000
Company:
Part Number:
X5043PI-2.7
Quantity:
1 050
4K
FEATURES
• Selectable time out watchdog timer
• Low V
• Long battery life with low power consumption
• 2.7V to 5.5V and 4.5V to 5.5V power supply
• 4Kbits of EEPROM–1M write cycle endurance
• Save critical data with Block Lock
• Built-in inadvertent write protection
• 3.3MHz clock rate
• Minimize programming time
• SPI modes (0,0 & 1,1)
• Available packages
BLOCK DIAGRAM
REV 1.1.2 5/29/01
—Five standard reset threshold voltages
—Re-program low V
—Reset signal valid to V
—<50µA max standby current, watchdog on
—<10µA max standby current, watchdog off
—<2mA max active current during read
versions
—Protect 1/4, 1/2, all or none of EEPROM array
—Write enable latch
—Write protect pin
—16-byte page write mode
—Self-timed write cycle
—5ms write cycle time (typical)
—8-lead MSOP, 8-lead SOIC, 8-pin PDIP
—14-lead TSSOP
CS/WDI
using special programming sequence.
SCK
V
WP
SO
CC
SI
CC
detection and reset assertion
V
CC
Reset Logic
CC
Command
Decode &
Register
Control
Logic
Threshold
Data
reset threshold voltage
CC
CPU Supervisor with 4K SPI EEPROM
= 1V
Watchdog Transition
memory
V
Detector
TRIP
X5043/X5045
www.xicor.com
Protect Logic
Register
1Kbits
1Kbits
2Kbits
Status
+
-
DESCRIPTION
These devices combine four popular functions, Power-
on Reset Control, Watchdog Timer, Supply Voltage
Supervision, and Block Lock Protect Serial EEPROM
Memory in one package. This combination lowers
system cost, reduces board space requirements, and
increases reliability.
Applying power to the device activates the power on
reset circuit which holds RESET/RESET active for a
period of time. This allows the power supply and oscil-
lator to stabilize before the processor executes code.
The Watchdog Timer provides an independent protec-
tion mechanism for microcontrollers. When the micro-
controller fails to restart a timer within a selectable
time out interval, the device activates the RESET/
RESET signal. The user selects the interval from three
preset values. Once selected, the interval does not
change, even after cycling the power.
The device’s low V
user’s system from low voltage conditions, resetting
the system when V
trip point. RESET/RESET is asserted until V
to proper operating level and stabilizes. Five industry
standard V
Xicor’s unique circuits allow the threshold to be repro-
grammed to meet custom requirements or to fine-tune
the threshold for applications requiring higher precision.
Power on and
Low Voltage
Timer Reset
Generation
Watchdog
Watchdog
Timebase
TRIP
Reset &
Reset
thresholds are available, however,
Characteristics subject to change without notice.
CC
CC
detection circuitry protects the
falls below the minimum V
512 x 8 Bit
RESET/RESET
X5043 = RESET
X5045 = RESET
CC
returns
1 of 20
CC

Related parts for X5043

X5043 Summary of contents

Page 1

... Watchdog Timebase 1Kbits 2Kbits Power on and Low Voltage + Reset - V Generation TRIP www.xicor.com 512 x 8 Bit detection circuitry protects the CC falls below the minimum returns CC thresholds are available, however, RESET/RESET X5043 = RESET X5045 = RESET Characteristics subject to change without notice. ...

Page 2

... When WP is held high, all functions, including non vol- atile writes operate normally. WP going low while still low will interrupt a write to the X5043/45. If the RESET/RESET internal write cycle has already been initiated, WP SCK going low will have no affect on a write. ...

Page 3

... X5043/X5045 PRINCIPLES OF OPERATION Power On Reset Application of power to the X5043/X5045 activates a Power On Reset Circuit. This circuit pulls the RESET/ RESET pin active. RESET/RESET prevents the sys- tem microprocessor from starting to operate with insuf- ficient voltage or prior to stabilization of the oscillator. When V exceeds the device V ...

Page 4

... Note: This operation also writes 00h to array address 03h. > 3V 15–18V 15-18V 02h Write X5043 X5045 www.xicor.com voltage, apply at least 3V to the V TRIP programming sequence. TRIP Bits ...

Page 5

... X5043/X5045 Figure 4. V Programming Sequence TRIP V Programming TRIP Execute Reset V TRIP Sequence Set Applied = CC CC Desired V TRIP New V Applied CC Execute = Set V Old V Applied TRIP CC Sequence - Error Apply Decrement –10mV RESET pin goes active? YES Measured V ...

Page 6

... WRSR instruction followed by 8 bits of data. These 8 bits of data correspond to the contents of the status register. The operation ends with CS going HIGH does not go HIGH between WREN and WRSR, the WRSR instruction is ignored. www.xicor.com Array Addresses Protected BL0 X5043/X5045 0 None 1 $180–$1FF 0 $100–$1FF 1 $000– ...

Page 7

... X5043/X5045 Table 2. Device Protect Matrix WREN CMD Device Pin (WEL) (WP Figure 6. Read Status Register Sequence CS SCK SI High Impedance SO Figure 7. Write Status Register Sequence CS SCK SI High Impedance SO Read Memory Array When reading from the EEPROM memory array first pulled low to select the device. The 8-bit READ instruction is transmitted to the device, followed by the 8-bit address ...

Page 8

... X5043/X5045 Figure 8. Read EEPROM Array Sequence SCK Instruction SI High Impedance SO Write Memory Array Prior to any attempt to write data into the memory array, the “Write Enable” Latch (WEL) must be set by issuing the WREN instruction (Figure 5). First pull CS LOW, then clock the WREN instruction into the device and pull CS HIGH ...

Page 9

... X5043/X5045 Figure 9. Write Memory Sequence SCK Instruction SCK Data Byte OPERATIONAL NOTES The device powers-up in the following state: – The device is in the low power standby state. – A HIGH to LOW transition required to enter an active state and receive an instruction. – ...

Page 10

... X5043/X5045 ABSOLUTE MAXIMUM RATINGS Temperature under bias ....................–65°C to +135°C Storage temperature ........................–65°C to +150°C Voltage on any pin with respect to V ...................................... –1.0V to +7V SS D.C. output current ............................................... 5mA Lead temperature (soldering, 10 seconds).........300°C RECOMMENDED OPERATING CONDITIONS Temperature Min. Commercial 0°C Industrial – ...

Page 11

... X5043/X5045 Equivalent A.C. Load Circuit 1.64K Output RESET/RESET 1.64K 30pF A.C. CHARACTERISTICS (Over recommended operating conditions, unless otherwise specified) Data Input Timing Symbol f Clock Frequency SCK t Cycle Time CYC t CS Lead Time LEAD t CS Lag Time LAG t Clock HIGH Time ...

Page 12

... X5043/X5045 Serial Output Timing CS SCK t V MSB Out SO ADDR SI LSB IN Serial Input Timing CS t LEAD SCK t SU MSB In SI High Impedance SO SYMBOL TABLE WAVEFORM INPUTS OUTPUTS Must be Will be steady steady May change Will change from LOW from LOW to HIGH to HIGH May change ...

Page 13

... X5043/X5045 Power-Up and Power-Down Timing V CC RESET (X5043) RESET (X5045) RESET Output Timing Symbol V Reset Trip Point Voltage, (-4.5A) TRIP Reset Trip Point Voltage, (Blank) Reset Trip Point Voltage, (-2.7A) Reset Trip Point Voltage, (-2.7) t Power-up Reset Time Out PURST ( Detect to Reset/Output RPD ...

Page 14

... X5043/X5045 V Programming Timing Diagram TRIP TRIP VPS CS SCK SI 06h V Programming Parameters TRIP Parameter t V Program Enable Voltage Setup time VPS TRIP t V Program Enable Voltage Hold time VPH TRIP t V Programming CS inactive time PCS TRIP t V Setup time ...

Page 15

... X5043/X5045 PACKAGING INFORMATION 8-Lead Miniature Small Outline Gull Wing Package Type M 0.012 + 0.006 / -0.002 (0.30 + 0.15 / -0.05) 0.036 (0.91) 0.032 (0.81) 0.040 ± 0.002 (1.02 ± 0.05) 0.007 (0.18) 0.005 (0.13) REV 1.1.2 5/29/01 0.118 ± 0.002 (3.00 ± 0.05) 0.0256 (0.65) Typ. 0.118 ± 0.002 (3.00 ± 0.05) 0.030 (0.76) 0.0216 (0.55) 7° Typ. 0.008 (0.20) 0.004 (0.10) 0.150 (3.81) Ref. ...

Page 16

... X5043/X5045 PACKAGING INFORMATION Half Shoulder Width On All End Pins Optional .073 (1.84) Typ. 0.010 (0.25) NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH REV 1.1.2 5/29/01 8-Lead Plastic Dual In-Line Package Type P 0.430 (10.92) 0.360 (9.14) Pin 1 Index Pin 1 0.300 (7.62) Ref. Seating Plane 0.150 (3.81) ...

Page 17

... X5043/X5045 PACKAGING INFORMATION 8-Lead Plastic Small Outline Gull Wing Package Type S Pin 1 Index 0.010 (0.25) 0.020 (0.50) 0° - 8° 0.016 (0.410) 0.037 (0.937) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) REV 1.1.2 5/29/01 Pin 1 0.014 (0.35) 0.019 (0.49) 0.188 (4.78) 0.197 (5.00) (4X) 7° 0.050 (1.27) X 45° 0.0075 (0.19) 0.010 (0.25) FOOTPRINT www ...

Page 18

... X5043/X5045 PACKAGING INFORMATION 0° - 8° See Detail “A” NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) REV 1.1.2 5/29/01 14-Lead Plastic, TSSOP, Package Type V .025 (.65) BSC .169 (4.3) .177 (4.5) .193 (4.9) .200 (5.1) .0075 (.19) .002 (.05) .0118 (.30) .006 (.15) .010 (.25) .019 (.50) .029 (.75) Detail A (20X) www.xicor.com .252 (6.4) BSC .047 (1.20) Gage Plane Seating Plane ...

Page 19

... X5043M8I -40°C–85°C X5043V14I -40°C–85°C X5043PI-2.7A -40°C–85°C X5043S8I-2.7A -40°C–85°C X5043M8I-2.7A -40°C–85°C X5043V14I-2.7A -40°C–85°C X5043PI-2.7 0°C–70°C X5043S8-2.7 -40°C–85°C X5043S8I-2.7 -40°C–85°C X5043M8I-2.7 -40°C–85°C X5043V14I-2.7 www ...

Page 20

... A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system affect its safety or effectiveness. REV 1.1.2 5/29/01 MSOP YWW XXX AEP/AEY = No Suffix; –40°C to +85°C AEN/AEW = -4.5A; –40°C to +85°C AET/AFC = -2.7; –40°C to +85°C AER/AFA = -2.7A; –40°C to +85°C X5043/X5045 = 4.25-4.5 TRIP = 4.5-4.75 TRIP = 4.25-4.5 TRIP = 4.5-4.75 TRIP = 2.55-2.7 TRIP = 2 ...

Related keywords