PEX8696-16U8DBBRDK PLX [PLX Technology], PEX8696-16U8DBBRDK Datasheet

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PEX8696-16U8DBBRDK

Manufacturer Part Number
PEX8696-16U8DBBRDK
Description
PCI Express Gen 2 Switch, 96 Lanes, 24 Ports
Manufacturer
PLX [PLX Technology]
Datasheet
Highlights
© PLX Technology, www.plxtech.com
o 96-lane, 24-port PCIe Gen2 switch
o 35 x 35mm
o Typical Power: 10.2 Watts
o Standards Compliant
o High Performance
o Flexible Configuration
o Multi-Host & Fail-Over Support
o Quality of Service (QoS)
o Reliability, Availability, Serviceability
PEX 8696 General Features
PEX 8696 Key Features
- Integrated 5.0 GT/s SerDes
- PCI Express Base Specification, r2.0
- PCI Power Management Spec, r1.2
- Microsoft Vista Compliant
- Supports Access Control Services
- Dynamic link-width control
- Dynamic SerDes speed control
♦ performancePAK
- Non-blocking switch fabric
- Full line rate on all ports
- Packet Cut-Thru with 176ns max packet
- 2KB Max Payload Size
- Ports configurable as x1, x2, x4, x8, x16
- Registers configurable with strapping
- Lane and polarity reversal
- Compatible with PCIe 1.0a PM
- Configurable Non-Transparent (NT) port
- Failover with NT port
- Up to Eight upstream/Host ports with 1+1
- Eight traffic classes per port
- Weighted round-robin source
♦ visionPAK
- 4 Hot Plug Ports with native HP Signals
- All ports hot plug capable thru I
- ECRC and Poison bit support
- Data Path parity
- Memory (RAM) Error Correction
- INTA# and FATAL_ERR# signals
- Advanced Error Reporting
- Port Status bits and GPIO available
- Per port error diagnostics
-
(backwards compatible w/ PCIe r1.0a/1.1)
latency (x16 to x16)
pins, EEPROM, I
or N+1 failover to other upstream ports
port arbitration
(Hot Plug Controller on every port)
JTAG AC/DC boundary scan
Read Pacing (bandwidth throttling)
Multicast
Dynamic Buffer/FC Credit Pool
Per Port Performance Monitoring
SerDes Eye Capture
Error Injection and Loopback
Per port payload & header counters
2
, 1156-ball FCBGA package
2
C, or host software
2
C
PEX 8696, PCI Express Gen 2 Switch, 96 Lanes, 24 Ports
The ExpressLane
switching capability enabling users to connect multiple hosts to their
respective endpoints via scalable, high bandwidth, non-blocking
interconnection to a wide variety of applications including servers,
storage systems, and communications platforms. The PEX 8696 is
well suited for fan-out, aggregation, and peer-to-peer applications.
Multi-Host Architecture
The PEX 8696 employs an enhanced version of PLX’s field tested PEX 8648
PCIe switch architecture, which allows users to configure the device in
legacy single-host mode or multi-host mode with up to eight host ports
capable of 1+1 (one active & one backup) or N+1 (N active & one backup)
host failover. This powerful architectural enhancement enables users to build
PCIe based systems to support high-availability, failover, redundant and
clustered systems.
High Performance & Low Packet Latency
The PEX 8696 architecture supports packet cut-thru with a maximum
latency of 176ns (x16 to x16). This, combined with large packet memory,
flexible common buffer/FC credit pool and non-blocking internal switch
architecture, provides full line rate on all ports for performance-hungry
applications such as servers and switch fabrics. The low latency enables
applications to achieve high throughput and performance. In addition to low
latency, the device supports a packet payload size of up to 2048 bytes,
enabling the user to achieve even higher throughput.
Data Integrity
The PEX 8696 provides end-to-end CRC (ECRC) protection and Poison bit
support to enable designs that require end-to-end data integrity. PLX also
supports data path parity and memory (RAM) error correction circuitry
throughout the internal data paths as packets pass through the switch.
Flexible Configuration
The PEX 8696’s 24 ports can be configured to lane widths of x1, x2, x4, x8,
or x16. Flexible buffer allocation,
along with the device's flexible
packet flow control, maximizes
throughput for applications where
more traffic flows in the
downstream, rather than upstream,
direction. Any port can be designated
as the upstream port, which can be
changed dynamically. Figure 1
shows some of the PEX 8696’s
common port configurations in
legacy Single-Host mode.
Page 1 of 1
TM
PEX 8696 device offers Multi-Host PCI Express
Figure 1. Common Port Configurations
6 x8
PEX 8696
PEX 8696
PEX 8696
PEX 8696
PEX 8696
PEX 8696
PEX 8696
PEX 8696
23 x4
10 x4
x8
x4
5/14/2009, Version 1.1
7 x8
PEX 8696
PEX 8696
PEX 8696
PEX 8696
PEX 8696
PEX 8696
PEX 8696
PEX 8696
10 x8
x8
8 x4
x16

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