RT9644 RICHTEK [Richtek Technology Corporation], RT9644 Datasheet
RT9644
Related parts for RT9644
RT9644 Summary of contents
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... ACPI Regulator/Controller for Dual Channel DDR Memory Systems General Description The RT9644 complete ACPI compliant power solution for DDR and DDR2 memory system with DIMMs dual channel systems. This RT9644 includes one synchronous buck controller for DDR/DDR2 V DDR/DDR2 bus terminator V ...
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... VIEW DRIVE4 21 REFADJ4 20 DRIVE3 19 FB3 18 FB4 17 COMP VQFN-28L 6x6 5VSBY 1 S3# 2 P12V 3 GND GND 4 DDR_VTT 5 DDR_VTT 6 29 VDDQ RT9644A DS9644/A-01 August 2007 22 DRIVE3 21 FB3 20 PWM4 19 FB4 18 COMP4 17 COMP ...
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... COMP Q6 21 DRIVE3 DDR_VTT 20 FB3 DDR_VTTSNS 7, 8 VDDQ VREF_OUT 12 VREF_IN VIDPGD 2 S3# S5# 25 5VDL 27, Exposed Pad (29 5VDL 27, Exposed Pad (29 RT9644/A SLP_S5# SLP_S5# www.richtek.com 3 ...
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... RT9644/A Functional Pin Description Pin No. RT9644 RT9644A 27, 4, 27, Exposed Pad (29) Exposed Pad (29 www.richtek.com 4 Preliminary Pin Name 5VSBY is the main internal power supply. The part works at normal operation mode (Icc_S0) and stand_by mode Icc_S5 5VSBY (< ...
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... In RT9644A, the pin connects the output of the V proper resister divider. In RT9644, the DRIVE3 pin provides the gate voltage for the lower V linear regulator pass transistor. Connect this pin to the gate terminal of an external N-MOSFET transistor. In RT9644A, the DRIVE3 pin provides the gate voltage for the V regulator pass transistor ...
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... RT9644/A Pin No. Pin Name RT9644 RT9644A -- 17 COMP4 -- 19 PWM4 22 22 OCSET PHASE 25 25 BOOT 26 26 UGATE 28 28 LGATE www.richtek.com 6 Preliminary The COMP4 pin provides the compensation AC network for the 2 synchronous DC-DC buck PWM controller. The PWM4 pin is the output of the 2 used for V ...
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... Peripheral Control Fault Thermal shut_down S3# S5# P12V 5VSBY GND FB COMP + - - + + + - - RAMP@ 250kHz 5VSBY + OC - 20uA + - - + - + + - VREE_OUT DDR_VTTSNS FB COMP + - - + + + - - RAMP@ 250kHz 5VSBY + OC - 20uA + - - + - + + - VREE_OUT DDR_VTTSNS RT9644/A BOOT UGATE PHASE LGATE OCSET DDR_VTT VDDQ VREF_IN BOOT UGATE PHASE LGATE OCSET DDR_VTT VDDQ VREF_IN www.richtek.com 7 ...
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... RT9644/A Absolute Maximum Ratings Supply Voltage, 5VSBY ------------------------------------------------------------------------------- 7V l Supply Voltage, P12V --------------------------------------------------------------------------------- 16V l BOOT -------------------------------------------------------------------------------- 7V l BOOT PHASE UGATE Voltage ------------------------------------------------------------------------------------------ V l LGATE Voltage ------------------------------------------------------------------------------------------ GND 0.3V to 5VSBY + 0.3V l Input, Output or I/O Voltage -------------------------------------------------------------------------- GND 0. Power Dissipation VQFN-28L 6x6 ------------------------------------------------------------------------------------------- 2.857W Package Thermal Resistance (Note 4) ...
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... Test Condition Periodic load applied with 30% I VTT_MAX duty cycle and 10ms period DRIVEn unloaded DRIVEn unloaded OCS ET By Design V /V S0/S3 FB REF V /V S0/S3 FB REF VREF_IN RT9644/A Min Typ Max Units -- 0 MHz -- 6 -- V/µ 0.75 V 2.2 -- ...
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... RT9644/A Parameter DDR_VTT UV Level V UV Level GMCH V UV Level TT_GMCH/CPU Thermal Shutdown Limit Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied ...
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... GMCH/CPU termination rail and the second for the DAC. ACPI State Transitions ACPI compliance is realized through the S3# and S5# sleep signals and through monitoring of the 12V ATX bus. Figure 1 and Figure 2 shows how the RT9644 and RT9644A individual regulators are controlled during all state transitions. S5# S3# ...
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... VDDQ regulator is already enabled and in regulation Transition When the system transits from active state to shutdown (S0 to S5) state, the RT9644/A IC disables all regulators and forces the VIDPGD pin LOW. This transition is represented on Figure 1 and Figure 2 at time t15. Fault Protection The RT9644/A monitors the V voltage,over-voltage and over-current protection ...
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... If a fault occurs prior to the Fault Reset Counter reaching 9 x Tss period, then the Fault Reset Counter is set back to zero. The RT9644/A will immediately shut down when the Fault Counter reaches a count of 4. When attempting to restart a faulted regulator, the RT9644/A will follow the preset start up sequencing ...
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... RT9644/A 100 20LOG 20 20LOG (R1/R2 Modulator -20 Gain - -60 10 100 1K 10K Frequency (Hz) Figure 4 Feedback Loop Design Procedure Use these guidelines for locating the poles and zeros of the compensation network: 1. Pick Gain (R2/R1) for desired 0dB crossing frequency (FC). ...
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... MOSFETs should be as short as possible and can carry 1A peak current. (6). Place all of the components as close possible. (7).VTT LDO must dissipate heat generated,the pin29 should be connected to the internal ground plane through four vias. OUT Below PCB gerber files are our test board for your reference : RT9644/A www.richtek.com 15 ...
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... RT9644/A Figure 5. Top Layer for RT9644 Figure 7. Top Layer for RT9644A www.richtek.com 16 Preliminary Figure 6. Bottom Layer for RT9644 Figure 8. Bottom Layer for RT9644A DS9644/A-01 August 2007 ...
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... V-Type 28L QFN 6x6 Package Richtek Technology Corporation Taipei Office (Marketing) 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Taipei County, Taiwan, R.O.C. Tel: (8862)89191466 Fax: (8862)89191465 Email: marketing@richtek.com RT9644/A SEE DETAIL DETAIL A Pin #1 ID and Tie Bar Mark Options ...