LCMXO1200 LATTICE [Lattice Semiconductor], LCMXO1200 Datasheet
LCMXO1200
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LCMXO1200 Summary of contents
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MachXO Family Data Sheet DS1002 Version 02.7, November 2007 ...
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... CPLD and FPGA devices on a single chip. LCMXO256 LCMXO640 256 640 2.0 6 1.2/1.8/2.5/3.3V 1.2/1.8/2.5/3. 159 78 74 113 78 74 101 159 1-1 Introduction Data Sheet DS1002 LCMXO1200 LCMXO2280 1200 2280 6.25 7.5 9.2 27 1.2/1.8/2.5/3.3V 1.2/1.8/2.5/3. 211 271 73 73 113 113 101 101 211 211 271 DS1002 Introduction_01.3 ...
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Lattice Semiconductor The devices use look-up tables (LUTs) and embedded block memories traditionally associated with FPGAs for flex- ible and efficient logic implementation. Through non-volatile technology, the devices provide the single-chip, high- security, instant-on capabilities traditionally associated with CPLDs. Finally, ...
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February 2007 Architecture Overview The MachXO family architecture contains an array of logic blocks surrounded by Programmable I/O (PIO). Some devices in this family have sysCLOCK PLLs and blocks of sysMEM™ Embedded Block RAM (EBRs). Figures 2-1, 2-2, and 2-3 ...
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Lattice Semiconductor Figure 2-1. Top View of the MachXO1200 Device sysMEM Embedded Block RAM (EBR) sysCLOCK PLL JTAG Port 1. Top view of the MachXO2280 device is similar but with higher LUT count, two PLLs, and three EBR blocks. Figure ...
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Lattice Semiconductor Figure 2-3. Top View of the MachXO256 Device JTAG Port Programmable Function Units with RAM (PFUs) PFU Blocks The core of the MachXO devices consists of PFU and PFF blocks. The PFUs can be programmed to perform Logic, ...
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Lattice Semiconductor There are 14 input signals: 13 signals from routing and one from the carry-chain (from the adjacent Slice/PFU). There are 7 outputs the routing and one to the carry-chain (to the adjacent Slice/PFU). Table 2-1 lists ...
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Lattice Semiconductor Modes of Operation Each Slice is capable of four modes of operation: Logic, Ripple, RAM, and ROM. The Slice in the PFF is capable of all modes except RAM. Table 2-2 lists the modes and the capability of ...
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Lattice Semiconductor Figure 2-6. Distributed Memory Primitives SPR16x2 AD0 AD1 AD2 AD3 DI0 DI1 WRE CK ROM16x1 AD0 AD1 AD2 AD3 ROM Mode: The ROM mode uses the same principal as the RAM modes, but without the Write port. Pre-loading ...
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Lattice Semiconductor The ispLEVER design tool takes the output of the synthesis tool and places and routes the design. Generally, the place and route tool is completely automatic, although an interactive routing editor is available to optimize the design. Clock/Control ...
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Lattice Semiconductor Figure 2-8. Primary Clocks for MachXO1200 and MachXO2280 Devices Routing Four secondary clocks are generated from four 16:1 muxes as shown in Figure 2-9. Four of the secondary clock sources come from dual function clock ...
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Lattice Semiconductor sysCLOCK Phase Locked Loops (PLLs) The MachXO1200 and MachXO2280 provide PLL support. The source of the PLL input divider can come from an external pin or from internal routing. There are four sources of feedback signals to the ...
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Lattice Semiconductor Table 2-5. PLL Signal Descriptions Signal I/O CLKI I Clock input from external pin or routing I PLL feedback input from PLL output, clock net, routing/external pin or internal feedback from CLKFB CLKINTFB port RST I “1” to ...
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Lattice Semiconductor Bus Size Matching All of the multi-port memory modes support different widths on each of the ports. The RAM bits are mapped LSB word 0 to MSB word 0, LSB word 1 to MSB word 1 and so ...
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Lattice Semiconductor The EBR memory supports three forms of write behavior for single or dual port operation: 1. Normal – data on the output appears only during the read cycle. During a write cycle, the data (at the current address) ...
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Lattice Semiconductor Figure 2-13. Memory Core Reset RSTA RSTB GSRN For further information on the sysMEM EBR block, see the details of additional technical documentation at the end of this data sheet. EBR Asynchronous Reset EBR asynchronous reset or GSR ...
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Lattice Semiconductor PIO Groups On the MachXO devices, PIO cells are assembled into two different types of PIO groups, those with four PIO cells and those with six PIO cells. PIO groups with four IOs are placed on the left ...
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Lattice Semiconductor output data signals are multiplexed and provide a single signal to the I/O pin via the sysIO buffer. Figure 2-17 shows the MachXO PIO logic. The tristate control signal is multiplexed from the output data signals and their ...
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Lattice Semiconductor of the devices also support differential input buffers. PCI clamps are available on the top Bank I/O buffers. The PCI clamp is enabled after V CC figured. The two pads in the pair are described as “true” and ...
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Lattice Semiconductor Table 2-8. I/O Support Device by Device MachXO256 Number of I/O Banks 2 Single-ended (all I/O Banks) Type of Input Buffers Single-ended buffers with complementary outputs (all I/O Banks) Types of Output Buffers Differential Output All I/O Banks ...
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Lattice Semiconductor Table 2-10. Supported Output Standards Output Standard Single-ended Interfaces LVTTL LVCMOS33 LVCMOS25 LVCMOS18 LVCMOS15 LVCMOS12 LVCMOS33, Open Drain LVCMOS25, Open Drain LVCMOS18, Open Drain LVCMOS15, Open Drain LVCMOS12, Open Drain 3 PCI33 Differential Interfaces 1, 2 LVDS 2 ...
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Lattice Semiconductor Figure 2-18. MachXO2280 Banks V CCIO7 GND V CCIO6 GND Figure 2-19. MachXO1200 Banks V CCIO7 GND V CCIO6 GND Bank 0 Bank Bank 5 ...
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Lattice Semiconductor Figure 2-20. MachXO640 Banks V CCO3 GND Figure 2-21. MachXO256 Banks GND V CCO1 Hot Socketing The MachXO devices have been carefully designed to ensure predictable behavior during power-up and power- down. Leakage into I/O pins is controlled ...
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Lattice Semiconductor the system. These capabilities make the MachXO ideal for many multiple power supply and hot-swap applica- tions. Sleep Mode The MachXO “C” devices (V = 1.8/2.5/3.3V) have a sleep mode that allows standby current to be reduced dra- ...
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Lattice Semiconductor Device Configuration All MachXO devices contain a test access port that can be used for device configuration and programming. The non-volatile memory in the MachXO can be configured in two different modes: • In IEEE 1532 mode via ...
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Lattice Semiconductor Figure 2-22. MachXO Configuration and Programming Port Background Mode Program in seconds Non-Volatile Memory Space Density Shifting The MachXO family has been designed to enable density migration in the same package. Furthermore, the archi- tecture ensures a high ...
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November 2007 Absolute Maximum Ratings Supply Voltage -0.5 to 1.32V . . . . . ...
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Lattice Semiconductor MachXO1200 and MachXO2280 Hot Socketing Specifications Symbol Parameter Non-LVDS General Purpose sysIOs I Input or I/O Leakage Current DK LVDS General Purpose sysIOs I Input or I/O Leakage Current DK_LVDS 1. Insensitive to sequence CC, ...
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... LCMXO1200C LCMXO2280C 4 All LCMXO ‘C’ Devices Over Recommended Operating Conditions Device LCMXO256C LCMXO640C LCMXO1200C LCMXO2280C LCMXO256E LCMXO640E LCMXO1200E LCMXO2280E LCMXO256E/C LCMXO640E/C LCMXO1200E/C LCMXO2280E/C 6 All devices 3-3 DC and Switching Characteristics MachXO Family Data Sheet 3 Typ. Max ...
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... Per Bank 2.5V. Does not include pull-up/pull-down. CCIO Over Recommended Operating Conditions Device LCMXO256C LCMXO640C LCMXO1200C LCMXO2280C LCMXO256E LCMXO640E LCMXO1200E LCMXO2280E LCMXO256E/C LCMXO640E/C LCMXO1200E/C LCMXO2280E/C 6 All devices or GND. 3-4 DC and Switching Characteristics MachXO Family Data Sheet 5 Typ ...
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... J 6. Per Bank 2.5V. Does not include pull-up/pull-down. CCIO Device LCMXO256C LCMXO640C LCMXO1200C LCMXO2280C LCMXO256E LCMXO640E LCMXO1200E LCMXO2280E LCMXO256C/E LCMXO640C/E LCMXO1200/E LCMXO2280C/E 6 All devices or GND. 3-5 DC and Switching Characteristics MachXO Family Data Sheet Typ. Units ...
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Lattice Semiconductor sysIO Recommended Operating Conditions Standard LVCMOS 3.3 LVCMOS 2.5 LVCMOS 1.8 LVCMOS 1.5 LVCMOS 1.2 LVTTL 3 PCI 1, 2 LVDS 1 LVPECL 1 BLVDS 1 RSDS 1. Inputs on chip. Outputs are implemented with the addition of ...
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Lattice Semiconductor sysIO Single-Ended DC Electrical Characteristics V IL Input/Output Standard Min. (V) Max. (V) LVCMOS 3.3 -0.3 0.8 LVTTL -0.3 0.8 LVCMOS 2.5 -0.3 0.7 LVCMOS 1.8 -0.3 0.35V CCIO LVCMOS 1.5 -0.3 0.35V CCIO LVCMOS 1.2 -0.3 0.42 ...
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Lattice Semiconductor sysIO Differential Electrical Characteristics LVDS Parameter Symbol Parameter Description V V Input Voltage INP, INM V Differential Input Threshold THD V Input Common Mode Voltage CM I Input current IN V Output high voltage for ...
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Lattice Semiconductor Table 3-1. LVDS DC Conditions Parameter Z Output impedance OUT R Driver series resistor S R Driver parallel resistor P R Receiver termination T V Output high voltage OH V Output low voltage OL V Output differential voltage ...
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Lattice Semiconductor Table 3-2. BLVDS DC Conditions Symbol Z OUT R TLEFT R TRIGHT For input buffer, see LVDS table. LVPECL The MachXO family supports the differential LVPECL standard ...
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Lattice Semiconductor For further information on LVPECL, BLVDS and other differential interfaces please see details of additional techni- cal documentation at the end of the data sheet. RSDS The MachXO family supports the differential RSDS standard. The output standard is ...
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Lattice Semiconductor Typical Building Block Function Performance Pin-to-Pin Performance (LVCMOS25 12mA Drive) Function Basic Functions 16-bit decoder 4:1 MUX 16:1 MUX Register-to-Register Performance Function Basic Functions 16:1 MUX 16-bit adder 16-bit counter 64-bit counter Embedded Memory Functions (1200 and 2280 ...
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... LCMXO1200 — LCMXO2280 — LCMXO256 1.3 LCMXO640 1.1 LCMXO1200 1.1 LCMXO2280 1.1 LCMXO256 -0.3 LCMXO640 -0.1 LCMXO1200 0.0 LCMXO2280 -0.4 LCMXO256 — LCMXO640 — LCMXO1200 — LCMXO2280 — LCMXO256 — LCMXO640 — LCMXO1200 — LCMXO2280 — 3-13 DC and Switching Characteristics MachXO Family Data Sheet - Max. Min. Max. Min. Max. 3.5 — ...
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Lattice Semiconductor MachXO Internal Timing Parameters Parameter Description PFU/PFF Logic Mode Timing t LUT4 delay ( inputs to F output) LUT4_PFU t LUT6 delay ( inputs to OFX output) LUT6_PFU t Set/Reset to output of PFU ...
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... Timing adders are characterized but not tested on every device. 2. LVCMOS timing is measured with the load specified in Switching Test Conditions table. 3. All other standards tested according to the appropriate specifications. 4. I/O standard only available in LCMXO1200 and LCMXO2280 devices. Rev Over Recommended Operating Conditions Description 0 ...
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... Over Recommended Operating Conditions Conditions Default duty cycle selected Fout ≥ 100MHz Fout < 100MHz Divider ratio = integer At 90% or 10% 90% to 90% 10% to 10% Device All LCMXO256 LCMXO640 LCMXO1200 LCMXO2280 All All Power Down Mode t PWRDN WSLEEPN WAWAKE 3-16 DC and Switching Characteristics MachXO Family Data Sheet Min ...
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... BSCAN test update register, falling edge of clock to output enabled BTUPOEN Rev. A 0.19 Figure 3-5. JTAG Port Timing Waveforms TMS TDI TCK TDO Data to be captured from I/O Data to be driven out to I/O Parameter LCMXO256 LCMXO640 LCMXO1200 LCMXO2280 Parameter t t BTS BTH t t BTCPL BTCPH t t BTCO BTCOEN V a ...
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Lattice Semiconductor Switching Test Conditions Figure 3-6 shows the output test load that is used for AC testing. The specific values for resistance, capacitance, voltage, and other test conditions are shown in Figure 3-5. Figure 3-6. Output Test Load, LVTTL ...
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November 2007 Signal Descriptions Signal Name I/O General Purpose P[Edge] [Row/Column I/O Number]_[A/B/C/D/E/F] GSRN I TSALL I NC — GND — V — — CCAUX V — CCIOx 1 SLEEPN I PLL and Clock Functions (Used as user ...
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... LCMXO1200C/E 144 TQFP 132 csBGA 256 ftBGA 113 101 211 48 42 105 ...
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... GND LCMXO256: 40, 84, 62, 75, 93, 12, 25, 42 LCMXO640: 40, 84, 81, 93, 62, 75, 30, 42, 12, 25 LCMXO1200/2280: 9, 41, 59, 83, 100, 76, 50 Pin orientation follows the conventional order from pin 1 marking of the top side view and counter-clockwise. 2. Pin orientation A1 starts from the upper left corner of the top side view with alphabetical order ascending vertically and numerical order ascending horizontally. ...
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... G7, G10, K7, K10 LCMXO640: F8, F7, F9, F10 LCMXO1200/2280: F8, F7 LCMXO640: H11, G11, K11, J11 LCMXO1200/2280: F9, F10 LCMXO640: L9, L10, L8, L7 LCMXO1200/2280: H11, G11 LCMXO640: K6, J6, H6, G6 LCMXO1200/2280: K11, J11 LCMXO640: None LCMXO1200/2280: L9, L10 LCMXO640: None LCMXO1200/2280: L8, L7 LCMXO640: None LCMXO1200/2280: K6, J6 LCMXO640: None LCMXO1200/2280: H6, G6 ...
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Lattice Semiconductor LCMXO256 and LCMXO640 Logic Signal Connections: 100 TQFP LCMXO256 Ball Pin Number Function Bank 1 PL2A 1 2 PL2B 1 3 PL3A 1 4 PL3B 1 5 PL3C 1 6 PL3D 1 7 PL4A 1 8 PL4B 1 ...
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Lattice Semiconductor LCMXO256 and LCMXO640 Logic Signal Connections: 100 TQFP (Cont.) LCMXO256 Ball Pin Number Function Bank 43 PB4A 1 44 PB4B 1 45 PB4C 1 46 PB4D 1 47 PB5A 1 48* SLEEPN - 49 PB5C 1 50 PB5D ...
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Lattice Semiconductor LCMXO256 and LCMXO640 Logic Signal Connections: 100 TQFP (Cont.) LCMXO256 Ball Pin Number Function Bank 85 PT4B 0 86 PT4A 0 87 PT3D 0 88 VCCAUX - 89 PT3C 0 90 VCC - 91 PT3B 0 92 VCCIO0 ...
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... Lattice Semiconductor LCMXO1200 and LCMXO2280 Logic Signal Connections: 100 TQFP LCMXO1200 Pin Ball Number Function Bank 1 PL2A 7 2 PL2B 7 3 PL3C 7 4 PL3D 7 5 PL4B 7 6 VCCIO7 7 7 PL6A 7 8 PL6B 7 9 GND - 10 PL7C 7 11 PL7D 7 12 PL8C 7 13 PL8D 7 14 ...
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... Lattice Semiconductor LCMXO1200 and LCMXO2280 Logic Signal Connections: 100 TQFP (Cont.) LCMXO1200 Pin Ball Number Function Bank 42 PB9A 4 43 PB9B 4 44 VCCIO4 4 45 PB10A 4 46 PB10B 4 47*** SLEEPN - 48 PB11A 4 49 PB11B 4 GNDIO3 50** - GNDIO4 51 PR16B 3 52 PR15B 3 53 PR15A 3 54 PR14B 3 55 ...
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... Lattice Semiconductor LCMXO1200 and LCMXO2280 Logic Signal Connections: 100 TQFP (Cont.) LCMXO1200 Pin Ball Number Function Bank 82 PT9A 1 83 GND - 84 PT8B 1 85 PT8A 1 86 PT7D 1 87 PT6F 0 88 PT6D 0 89 PT6C 0 90 VCCAUX - 91 VCC - 92 PT5B 0 93 PT4B 0 94 VCCIO0 0 95 PT3D ...
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Lattice Semiconductor LCMXO256 and LCMXO640 Logic Signal Connections: 100 csBGA LCMXO256 Ball Ball Number Function Bank B1 PL2A 1 C1 PL2B 1 D2 PL3A 1 D1 PL3B 1 C2 PL3C 1 E1 PL3D 1 E2 PL4A 1 F1 PL4B 1 ...
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Lattice Semiconductor LCMXO256 and LCMXO640 Logic Signal Connections: 100 csBGA (Cont.) LCMXO256 Ball Ball Number Function Bank P13 PB5A 1 M12* SLEEPN - P14 PB5C 1 N13 PB5D 1 N14 PR9B 0 M14 PR9A 0 L13 PR8B 0 L14 PR8A ...
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Lattice Semiconductor LCMXO256 and LCMXO640 Logic Signal Connections: 100 csBGA (Cont.) LCMXO256 Ball Ball Number Function Bank A4 GNDIO0 0 B4 PT3A 0 A3 PT2F 0 B3 PT2E 0 A2 PT2D 0 C3 PT2C 0 A1 PT2B 0 B2 PT2A ...
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... Lattice Semiconductor LCMXO640, LCMXO1200 and LCMXO2280 Logic Signal Connections: 132 csBGA LCMXO640 Ball Dual Ball # Function Bank Function Differential Ball # B1 PL2A PL2B PL2C PL2D PL3A PL3B PL3D 3 E1 GNDIO3 3 E2 PL5A PL5B 3 GSRN C F2 ...
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... Lattice Semiconductor LCMXO640, LCMXO1200 and LCMXO2280 Logic Signal Connections: 132 csBGA (Cont.) LCMXO640 Ball Dual Ball # Function Bank Function Differential Ball # M9 PB7B 2 C N10 PB7E 2 T P10 PB7F 2 C N11 GNDIO2 2 P11 PB8C 2 T M11 PB8D 2 C P12 PB9C 2 T P13 ...
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... Lattice Semiconductor LCMXO640, LCMXO1200 and LCMXO2280 Logic Signal Connections: 132 csBGA (Cont.) LCMXO640 Ball Dual Ball # Function Bank Function Differential Ball # B9 PT7B PT7A PT6B 0 PCLK0_1*** C B8 PT6A PT5B 0 PCLK0_0*** C B7 PT5A VCCAUX - C7 VCC - A6 PT4D PT4C ...
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... Lattice Semiconductor LCMXO640, LCMXO1200 and LCMXO2280 Logic Signal Connections: 144 TQFP LCMXO640 Pin Ball Dual Number Function Bank Function Differential 1 PL2A 3 2 PL2C 3 3 PL2B 3 4 PL3A 3 5 PL2D 3 6 PL3B 3 7 PL3C 3 8 PL3D 3 9 PL4A 3 10 VCCIO3 3 11 GNDIO3 ...
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... Lattice Semiconductor LCMXO640, LCMXO1200 and LCMXO2280 Logic Signal Connections: 144 TQFP (Cont.) LCMXO640 Pin Ball Dual Number Function Bank Function Differential 51 TDI 2 TDI 52 VCC - 53 VCCAUX - 54 PB5A 2 55 PB5B 2 PCLKT2_1*** 56 PB5D 2 57 PB6A 2 58 PB6B 2 PCLKT2_0*** 59 GND - 60 PB7C 2 61 PB7E 2 62 PB8A ...
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... Lattice Semiconductor LCMXO640, LCMXO1200 and LCMXO2280 Logic Signal Connections: 144 TQFP (Cont.) LCMXO640 Pin Ball Dual Number Function Bank Function Differential 101 PR3D 1 102 PR3C 1 103 PR3B 1 104 PR2D 1 105 PR3A 1 106 PR2B 1 107 PR2C 1 108 PR2A 1 109 PT9F 0 110 PT9D ...
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... Lattice Semiconductor LCMXO640, LCMXO1200 and LCMXO2280 Logic Signal Connections: 256 ftBGA LCMXO640 Ball Ball Dual Number Function Bank Function Differential GND GNDIO3 3 VCCIO3 VCCIO3 PL3A PL3B PL2C PL2D PL2A ...
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... Lattice Semiconductor LCMXO640, LCMXO1200 and LCMXO2280 Logic Signal Connections: 256 ftBGA (Cont.) LCMXO640 Ball Ball Dual Number Function Bank Function Differential J4 PL8A PL8B PL11A PL11B PL10C PL10D PL11C PL11D 3 C VCCIO3 ...
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... Lattice Semiconductor LCMXO640, LCMXO1200 and LCMXO2280 Logic Signal Connections: 256 ftBGA (Cont.) LCMXO640 Ball Ball Dual Number Function Bank Function Differential - - - - M10 PB6A PB6C 2 T R10 PB6D 2 C T10 PB7C 2 T T11 PB7D 2 C N10 NC N11 NC VCCIO2 VCCIO2 2 GND GNDIO2 ...
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... Lattice Semiconductor LCMXO640, LCMXO1200 and LCMXO2280 Logic Signal Connections: 256 ftBGA (Cont.) LCMXO640 Ball Ball Dual Number Function Bank Function Differential J13 PR8C 1 T GND GND - K14 PR8B 1 C J14 PR8A 1 T K15 PR7D 1 C J15 PR7C K12 NC J12 NC J16 ...
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... Lattice Semiconductor LCMXO640, LCMXO1200 and LCMXO2280 Logic Signal Connections: 256 ftBGA (Cont.) LCMXO640 Ball Ball Dual Number Function Bank Function Differential E11 NC E10 NC D12 PT9D 0 C D11 PT9C 0 T A14 PT7F 0 C A13 PT7E 0 T C12 PT8B 0 C C11 PT8A ...
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... Lattice Semiconductor LCMXO640, LCMXO1200 and LCMXO2280 Logic Signal Connections: 256 ftBGA (Cont.) LCMXO640 Ball Ball Dual Number Function Bank Function Differential PT2B PT2A VCCIO0 VCCIO0 0 GND GNDIO0 0 A1 GND - A16 GND - F11 GND - G8 GND - G9 GND - H7 GND ...
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Lattice Semiconductor LCMXO2280 Logic Signal Connections: 324 ftBGA Ball Number Ball Function GND GNDIO7 VCCIO7 VCCIO7 D4 PL2A F5 PL2B B3 PL3A C3 PL3B E4 PL3C G6 PL3D A1 PL4A B1 PL4B F4 PL4C VCC VCC E3 PL4D D2 PL5A ...
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Lattice Semiconductor LCMXO2280 Logic Signal Connections: 324 ftBGA (Cont.) Ball Number Ball Function G2 PL11A H2 PL11B L3 PL11C L5 PL11D H1 PL12A VCCIO6 VCCIO6 GND GNDIO6 J2 PL12B L4 PL12C L6 PL12D K2 PL13A K1 PL13B J1 PL13C VCC ...
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Lattice Semiconductor LCMXO2280 Logic Signal Connections: 324 ftBGA (Cont.) Ball Number Ball Function T2 PL20B P6 TMS V1 PB2A U2 PB2B T3 PB2C N7 TCK R4 PB2D R5 PB3A T4 PB3B VCC VCC R6 PB3C P7 PB3D U3 PB4A T5 ...
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Lattice Semiconductor LCMXO2280 Logic Signal Connections: 324 ftBGA (Cont.) Ball Number Ball Function V10 PB9B N10 PB9C R10 PB9D P10 PB10F T10 PB10E U10 PB10D V11 PB10C U11 PB10B VCCIO4 VCCIO4 GND GNDIO4 T11 PB10A U12 PB11A R11 PB11B GND ...
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Lattice Semiconductor LCMXO2280 Logic Signal Connections: 324 ftBGA (Cont.) Ball Number Ball Function GND GNDIO3 VCCIO3 VCCIO3 P15 PR20B N14 PR20A N15 PR19B M13 PR19A R15 PR18B T16 PR18A N16 PR17D M14 PR17C U17 PR17B VCC VCC U18 PR17A R17 ...
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Lattice Semiconductor LCMXO2280 Logic Signal Connections: 324 ftBGA (Cont.) Ball Number Ball Function J13 PR10C M18 PR10B L18 PR10A GND GNDIO2 VCCIO2 VCCIO2 H16 PR9D H14 PR9C K18 PR9B J18 PR9A J17 PR8D VCC VCC H18 PR8C H17 PR8B G17 ...
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Lattice Semiconductor LCMXO2280 Logic Signal Connections: 324 ftBGA (Cont.) Ball Number Ball Function E13 PT16D C15 PT16C F13 PT16B D14 PT16A A18 PT15D B17 PT15C A16 PT15B A17 PT15A VCC VCC D13 PT14D F12 PT14C C14 PT14B E12 PT14A C13 ...
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Lattice Semiconductor LCMXO2280 Logic Signal Connections: 324 ftBGA (Cont.) Ball Number Ball Function A10 PT8E VCCIO0 VCCIO0 GND GNDIO0 A9 PT8D C9 PT8C B9 PT8B F9 VCCAUX A8 PT8A B8 PT7D C8 PT7C VCC VCC A7 PT7B B7 PT7A A6 ...
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Lattice Semiconductor LCMXO2280 Logic Signal Connections: 324 ftBGA (Cont.) Ball Number Ball Function F16 GND H10 GND H11 GND H8 GND H9 GND J10 GND J11 GND J4 GND J8 GND J9 GND K10 GND K11 GND K17 GND K8 ...
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Lattice Semiconductor LCMXO2280 Logic Signal Connections: 324 ftBGA (Cont.) Ball Number Ball Function G8 VCCIO0 G7 VCCIO0 * Supports true LVDS outputs for “E” devices. *** Primary clock inputs are single-ended. MachXO Family Data Sheet LCMXO2280 Bank Dual ...
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Lattice Semiconductor Thermal Management Thermal management is recommended as part of any sound FPGA design methodology. To assess the thermal characteristics of a system, Lattice specifies a maximum allowable junction temperature in all device data sheets. Designers must complete a ...
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August 2006 Part Number Description LCMXO XXXX X – X XXXXXX X XX Device Family MachXO Crossover PLD Logic Capacity 256 LUTs = 256 640 LUTs = 640 1200 LUTs = 1200 2280 LUTs = 2280 Supply Voltage C = ...
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... LCMXO640C-3FT256C 640 LCMXO640C-4FT256C 640 LCMXO640C-5FT256C 640 Part Number LUTs LCMXO1200C-3T100C 1200 LCMXO1200C-4T100C 1200 LCMXO1200C-5T100C 1200 LCMXO1200C-3T144C 1200 LCMXO1200C-4T144C 1200 LCMXO1200C-5T144C 1200 LCMXO1200C-3M132C 1200 LCMXO1200C-4M132C 1200 LCMXO1200C-5M132C 1200 LCMXO1200C-3FT256C 1200 LCMXO1200C-4FT256C 1200 LCMXO1200C-5FT256C 1200 Commercial Supply Voltage I/Os Grade 1.8V/2.5V/3.3V 78 1.8V/2.5V/3.3V 78 1.8V/2.5V/3.3V 78 1.8V/2.5V/3.3V 78 1.8V/2.5V/3.3V 78 1.8V/2.5V/3.3V 78 Supply Voltage ...
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Lattice Semiconductor Part Number LUTs LCMXO2280C-3T100C 2280 LCMXO2280C-4T100C 2280 LCMXO2280C-5T100C 2280 LCMXO2280C-3T144C 2280 LCMXO2280C-4T144C 2280 LCMXO2280C-5T144C 2280 LCMXO2280C-3M132C 2280 LCMXO2280C-4M132C 2280 LCMXO2280C-5M132C 2280 LCMXO2280C-3FT256C 2280 LCMXO2280C-4FT256C 2280 LCMXO2280C-5FT256C 2280 LCMXO2280C-3FT324C 2280 LCMXO2280C-4FT324C 2280 LCMXO2280C-5FT324C 2280 Part Number LUTs LCMXO256E-3T100C 256 ...
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... Lattice Semiconductor Part Number LUTs LCMXO1200E-3T100C 1200 LCMXO1200E-4T100C 1200 LCMXO1200E-5T100C 1200 LCMXO1200E-3T144C 1200 LCMXO1200E-4T144C 1200 LCMXO1200E-5T144C 1200 LCMXO1200E-3M132C 1200 LCMXO1200E-4M132C 1200 LCMXO1200E-5M132C 1200 LCMXO1200E-3FT256C 1200 LCMXO1200E-4FT256C 1200 LCMXO1200E-5FT256C 1200 Part Number LUTs LCMXO2280E-3T100C 2280 LCMXO2280E-4T100C 2280 LCMXO2280E-5T100C 2280 LCMXO2280E-3T144C 2280 LCMXO2280E-4T144C ...
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... LCMXO640C-4M132I 640 LCMXO640C-3FT256I 640 LCMXO640C-4FT256I 640 Part Number LUTs LCMXO1200C-3T100I 1200 LCMXO1200C-4T100I 1200 LCMXO1200C-3T144I 1200 LCMXO1200C-4T144I 1200 LCMXO1200C-3M132I 1200 LCMXO1200C-4M132I 1200 LCMXO1200C-3FT256I 1200 LCMXO1200C-4FT256I 1200 Part Number LUTs LCMXO2280C-3T100I 2280 LCMXO2280C-4T100I 2280 LCMXO2280C-3T144I 2280 LCMXO2280C-4T144I 2280 LCMXO2280C-3M132I 2280 LCMXO2280C-4M132I 2280 ...
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... LCMXO640E-4M132I 640 LCMXO640E-3FT256I 640 LCMXO640E-4FT256I 640 Part Number LUTs LCMXO1200E-3T100I 1200 LCMXO1200E-4T100I 1200 LCMXO1200E-3T144I 1200 LCMXO1200E-4T144I 1200 LCMXO1200E-3M132I 1200 LCMXO1200E-4M132I 1200 LCMXO1200E-3FT256I 1200 LCMXO1200E-4FT256I 1200 Part Number LUTs LCMXO2280E-3T100I 2280 LCMXO2280E-4T100I 2280 LCMXO2280E-3T144I 2280 LCMXO2280E-4T144I 2280 LCMXO2280E-3M132I 2280 LCMXO2280E-4M132I 2280 ...
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... Part Number LUTs LCMXO1200C-3TN100C 1200 LCMXO1200C-4TN100C 1200 LCMXO1200C-5TN100C 1200 LCMXO1200C-3TN144C 1200 LCMXO1200C-4TN144C 1200 LCMXO1200C-5TN144C 1200 LCMXO1200C-3MN132C 1200 LCMXO1200C-4MN132C 1200 LCMXO1200C-5MN132C 1200 LCMXO1200C-3FTN256C 1200 LCMXO1200C-4FTN256C 1200 LCMXO1200C-5FTN256C 1200 Part Number LUTs LCMXO2280C-3TN100C 2280 LCMXO2280C-4TN100C 2280 LCMXO2280C-5TN100C 2280 Commercial Supply Voltage I/Os Grade 1 ...
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Lattice Semiconductor Part Number LUTs LCMXO2280C-3TN144C 2280 LCMXO2280C-4TN144C 2280 LCMXO2280C-5TN144C 2280 LCMXO2280C-3MN132C 2280 LCMXO2280C-4MN132C 2280 LCMXO2280C-5MN132C 2280 LCMXO2280C-3FTN256C 2280 LCMXO2280C-4FTN256C 2280 LCMXO2280C-5FTN256C 2280 LCMXO2280C-3FTN324C 2280 LCMXO2280C-4FTN324C 2280 LCMXO2280C-5FTN324C 2280 Part Number LUTs LCMXO256E-3TN100C 256 LCMXO256E-4TN100C 256 LCMXO256E-5TN100C 256 LCMXO256E-3MN100C 256 ...
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... Lattice Semiconductor Part Number LUTs LCMXO1200E-3TN100C 1200 LCMXO1200E-4TN100C 1200 LCMXO1200E-5TN100C 1200 LCMXO1200E-3TN144C 1200 LCMXO1200E-4TN144C 1200 LCMXO1200E-5TN144C 1200 LCMXO1200E-3MN132C 1200 LCMXO1200E-4MN132C 1200 LCMXO1200E-5MN132C 1200 LCMXO1200E-3FTN256C 1200 LCMXO1200E-4FTN256C 1200 LCMXO1200E-5FTN256C 1200 Part Number LUTs LCMXO2280E-3TN100C 2280 LCMXO2280E-4TN100C 2280 LCMXO2280E-5TN100C 2280 LCMXO2280E-3TN144C 2280 LCMXO2280E-4TN144C ...
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... LCMXO640C-4MN132I 640 LCMXO640C-3FTN256I 640 LCMXO640C-4FTN256I 640 Part Number LUTs LCMXO1200C-3TN100I 1200 LCMXO1200C-4TN100I 1200 LCMXO1200C-3TN144I 1200 LCMXO1200C-4TN144I 1200 LCMXO1200C-3MN132I 1200 LCMXO1200C-4MN132I 1200 LCMXO1200C-3FTN256I 1200 LCMXO1200C-4FTN256I 1200 Part Number LUTs LCMXO2280C-3TN100I 2280 LCMXO2280C-4TN100I 2280 LCMXO2280C-3TN144I 2280 LCMXO2280C-4TN144I 2280 LCMXO2280C-3MN132I 2280 LCMXO2280C-4MN132I 2280 ...
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... LCMXO640E-4MN132I 640 LCMXO640E-3FTN256I 640 LCMXO640E-4FTN256I 640 Part Number LUTs LCMXO1200E-3TN100I 1200 LCMXO1200E-4TN100I 1200 LCMXO1200E-3TN144I 1200 LCMXO1200E-4TN144I 1200 LCMXO1200E-3MN132I 1200 LCMXO1200E-4MN132I 1200 LCMXO1200E-3FTN256I 1200 LCMXO1200E-4FTN256I 1200 Part Number LUTs LCMXO2280E-3TN100I 2280 LCMXO2280E-4TN100I 2280 LCMXO2280E-3TN144I 2280 LCMXO2280E-4TN144I 2280 LCMXO2280E-3MN132I 2280 LCMXO2280E-4MN132I 2280 ...
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November 2007 For Further Information A variety of technical notes for the MachXO family are available on the Lattice web site at www.latticesemi.com. • MachXO sysIO Usage Guide (TN1091) • MachXO sysCLOCK PLL Design and Usage Guide (TN1089) • MachXO ...
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... MachXO Density Migration Technical Note (TN1097) added. Information Added “Power Supply and NC Connections” summary information for LCMXO1200 and LCMXO2280 in 100 TQFP package. Supply Current (Standby) table updated with LCMXO1200/2280 data. Ordering Part Number section updated (added LCMXO2280C "4W"). Introduction Introduction paragraphs updated. ...
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Lattice Semiconductor Date Version April 2006 02.0 Architecture (cont.) (cont.) DC and Switching Characteristics Pinout Information Ordering Information May 2006 02.1 Pinout Information August 2006 02.2 Section “Top View of the MachXO1200 Device” figure updated. (cont.) “Top View of the ...
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Lattice Semiconductor Date Version November 2006 02.3 DC and Switching Characteristics December 2006 02.4 Architecture Pinout Information February 2007 02.5 Architecture August 2007 02.6 DC and Switching Characteristics November 2007 02.7 DC and Switching Characteristics Pinout Information Supplemental Information Section ...