GAL20LV8D-7LJ LATTICE [Lattice Semiconductor], GAL20LV8D-7LJ Datasheet
GAL20LV8D-7LJ
Related parts for GAL20LV8D-7LJ
GAL20LV8D-7LJ Summary of contents
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... Output Logic Macrocell (OLMC configured by the user. An important subset of the many architecture configura- tions possible with the GAL20LV8D are the PAL architectures listed in the table of the macrocell description section. GAL20LV8D devices are capable of emulating any of these PAL architectures with full function/fuse map compatibility ...
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... Commercial Grade Specifications Tpd (ns) Tsu (ns) Tco (ns) Icc (mA) 3 Part Number Description GAL20LV8D Device Name Speed (ns Low Power Power Ordering # GAL20LV8D-3LJ 70 70 GAL20LV8D-5LJ 70 GAL20LV8D-7LJ _ XXXXXXXX Specifications GAL20LV8 Package 28-Lead PLCC 28-Lead PLCC 28-Lead PLCC Grade Blank = Commercial Package J = PLCC ...
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... The following is a list of the PAL architectures that the GAL20LV8D can emulate. It also shows the OLMC mode under which the devices emulate the PAL architecture. ...
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Registered Mode In the Registered mode, macrocells are configured as dedicated registered outputs or as I/O functions. Architecture configurations available in this mode are similar to the common 20R8 and 20RP4 devices with various permutations of polarity, I/O and register ...
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Registered Mode Logic Diagram 0000 0280 4 0320 0600 5 0640 0920 6 0960 1240 7 1280 1560 9 1600 1880 10 1920 2200 11 2240 2520 12 13 64-USER ELECTRONIC SIGNATURE FUSES 2568, 2569, .... Byte7 ...
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Complex Mode In the Complex mode, macrocells are configured as output only or I/O functions. Architecture configurations available in this mode are similar to the common 20L8 and 20P8 devices with programmable polarity in each macrocell six I/Os ...
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Complex Mode Logic Diagram 0000 0280 4 0320 0600 5 0640 0920 6 0960 1240 7 1280 1560 9 1600 1880 10 1920 2200 11 2240 2520 12 13 64-USER ELECTRONIC SIGNATURE FUSES 2568, 2569, .... Byte7 ...
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Simple Mode In the Simple mode, pins are configured as dedicated inputs or as dedicated, always active, combinatorial outputs. Architecture configurations available in this mode are similar to the common 14L8 and 16P6 devices with many permutations of ge- neric ...
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Simple Mode Logic Diagram 0000 0280 4 0320 0600 5 0640 0920 6 0960 1240 7 1280 1560 9 1600 1880 10 1920 2200 11 2240 2520 12 13 64-USER ELECTRONIC SIGNATURE FUSES 2568, 2569, .... Byte7 ...
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Absolute Maximum Ratings Supply voltage V ................................... –0.5 to +4.6V CC Input voltage applied ................................ –0.5 to +5.6V I/O voltage applied ................................... –0.5 to +4.6V Off-state output voltage applied ............... –0.5 to +4.6V Storage Temperature ................................ –65 to 150 C ...
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AC Switching Characteristics TEST DESCRIPTION PARAMETER COND Input or I/O to Combinational Output Clock to Output Delay — Clock to Feedback Delay t su — Setup Time, ...
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Switching Waveforms INPUT or I/O FEEDBACK COMBINATIONAL OUTPUT Combinatorial Output INPUT or I/O FEEDBACK t dis COMBINATIONAL OUTPUT Input or I/O to Output Enable/Disable t wh CLK f 1/ max (w/o fb) Clock Width Specifications GAL20LV8 INPUT or I/O FEEDBACK ...
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Descriptions max with External Feedback 1/( Note: fmax with external feedback is calculated from measured tsu and ...
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... NOTE: The electronic signature is included in checksum calcula- tions. Changing the electronic signature will alter the checksum. Security Cell A security cell is provided in the GAL20LV8D devices to prevent unauthorized copying of the array patterns. Once programmed, this cell prevents further read access to the functional bits in the device ...
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... Power-Up Reset INTERNAL REGISTER Q - OUTPUT FEEDBACK/EXTERNAL OUTPUT REGISTER Circuitry within the GAL20LV8D provides a reset signal to all reg- isters during power-up. All internal registers will have their Q outputs t set low after a specified time ( pr MAX result, the state on the registered output pins (if they are enabled) will always be high on power-up, regardless of the programmed polarity of the output pins ...
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Typical AC and DC Characteristic Diagrams Normalized Tpd vs Vcc 1.2 PT H->L 1.1 PT L->H 1 0.9 0.8 3.00 3.15 3.30 3.45 3.60 Supply Voltage (V) Normalized Tpd vs Temp 1.2 PT H->L 1.1 PT L->H 1 0.9 0.8 ...
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Typical AC and DC Characteristic Diagrams Vol vs Iol 1 0.75 0.5 0.25 0 0.00 5.00 10.00 15.00 20.00 25.00 30.00 Iol (mA) Normalized Icc vs Vcc 1.20 1.10 1.00 0.90 0.80 3.00 3.15 3.30 3.45 Supply Voltage (V) Delta ...