GAL20LV8ZD-25QJ LATTICE [Lattice Semiconductor], GAL20LV8ZD-25QJ Datasheet
GAL20LV8ZD-25QJ
Related parts for GAL20LV8ZD-25QJ
GAL20LV8ZD-25QJ Summary of contents
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... Glue Logic for 3.3V Systems — Ideal for Mixed 3.3V and 5V Systems • ELECTRONIC SIGNATURE FOR IDENTIFICATION Description The GAL20LV8ZD, at 100 A standby current and 15ns propagation delay provides the highest speed low-voltage PLD available in the market. The GAL20LV8ZD is manufactured using Lattice Semiconductor's advanced 3.3V E ...
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... Tsu (ns) Tco (ns) Icc (mA Part Number Description Device Name GAL20LV8ZD (Zero Power DPP) Speed (ns) Active Power Q = Quarter Power Specifications GAL20LV8ZD Isb ( A) Ordering # 55 100 GAL20LV8ZD-15QJ 55 100 GAL20LV8ZD-25QJ _ XXXXXXXX Package 28-Lead PLCC 28-Lead PLCC Grade Blank = Commercial Package J = PLCC ...
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... When using the standard GAL20V8 JEDEC fuse pattern generated by the logic compilers for the GAL20LV8ZD, special attention must be given to pin 5 (DPP) to make sure that it is not used as one of the functional inputs. ...
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... Specifications GAL20LV8ZD Registered outputs have eight product terms per output. I/Os have seven product terms per output. Pin 5 is used as dedicated power-down pin on GAL20LV8ZD. It cannot be used as functional input. The JEDEC fuse numbers, including the User Electronic Signature (UES) fuses and the Product Term Disable (PTD) fuses, are shown on the logic diagram on the following page ...
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... ELECTRONIC SIGNATURE FUSES 2568, 2569, .... Byte7 Byte6 .... MSB LSB Specifications GAL20LV8ZD PLCC Package Pinout 2640 PTD 2703 .... 2630, 2631 .... Byte1 Byte0 5 27 OLMC 26 XOR-2560 AC1-2632 ...
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... All macrocells have seven product terms per output. One product term is used for programmable output enable control. Pins 2 and 16 are always available as data inputs into the AND array. Pin 5 is used as dedicated power-down pin on GAL20LV8ZD. It cannot be used as functional input. The JEDEC fuse numbers including the UES fuses and PTD fuses are shown on the logic diagram on the following page ...
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... ELECTRONIC SIGNATURE FUSES 2568, 2569, .... Byte7 Byte6 .... MSB LSB Specifications GAL20LV8ZD PLCC Package Pinout 2640 PTD 2703 .... 2630, 2631 .... Byte1 Byte0 7 27 OLMC 26 XOR-2560 AC1-2632 ...
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... Pins 2 and 16 are always available as data inputs into the AND array. The center two macrocells (pins 21 & 23) cannot be used in the input configuration. Pin 5 is used as dedicated power-down pin on GAL20LV8ZD. It cannot be used as functional input. The JEDEC fuse numbers including the UES fuses and PTD fuses are shown on the logic diagram ...
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... ELECTRONIC SIGNATURE FUSES 2568, 2569, .... Byte7 Byte6 .... MSB LSB Specifications GAL20LV8ZD PLCC Package Pinouts 2640 PTD 2703 .... 2630, 2631 .... Byte1 Byte0 9 27 OLMC XOR-2560 26 AC1-2632 ...
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... Supply Current f toggle 1) One output at a time for a maximum duration of one second. Vout = 0.5V was selected to avoid test problems by tester ground degradation. Characterized but not 100% tested. 2) Typical values are at Vcc = 3.3V and T Specifications GAL20LV8ZD Recommended Operating Conditions (1) 0.5 to +5.6V Commercial Devices: - Ambient Temperature (T Supply voltage (V with Respect to Ground ...
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... Refer to Switching Test Conditions section. 2) Calculated from fmax with internal feedback. Refer to fmax Description section. 3) Refer to fmax Description section. Capacitance ( 1.0 MHz) A SYMBOL PARAMETER C Input Capacitance I C I/O Capacitance I/O Specifications GAL20LV8ZD Over Recommended Operating Conditions TYPICAL UNITS COM COM -25 -15 MIN. MAX. MIN. MAX. 3 ...
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... DPP Low to Valid Clock t dlov A DPP Low to Valid Output 1) Refer to Switching Test Conditions section. Dedicated Power-Down Pin Timing Waveforms DPP INPUT or I/O FEEDBACK OE CLK OUTPUT Specifications GAL20LV8ZD Over Recommended Operating Conditions ivdh dhix ixdl gvdh dhgx gxdl ...
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... Switching Waveforms INPUT or I/O FEEDBACK COMBINATIONAL OUTPUT Combinatorial Output INPUT or I/O FEEDBACK t dis COMBINATIONAL OUTPUT Input or I/O to Output Enable/Disable t wh CLK f 1/ max (w/o fb) Clock Width Specifications GAL20LV8ZD INPUT or I/O FEEDBACK VALID INPUT t pd CLK REGISTERED OUTPUT REGISTERED OUTPUT t wl CLK REGISTERED FEEDBACK 13 VALID INPUT ...
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... B Active High 270 Active Low 270 C Active High 270 Active Low 270 Specifications GAL20LV8ZD su+ co) Note: tcf is a calculated value, derived by subtracting tsu from the period of fmax w/internal feedback (tcf = 1/fmax - tsu). The value of tcf is used primarily when calculating the delay from clocking a register to a combinatorial output (through registered feed- back), as shown above ...
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... NOTE: The electronic signature is included in checksum calcula- tions. Changing the electronic signature will alter checksum. Security Cell A security cell is provided in the GAL20LV8ZD devices to prevent unauthorized copying of the array patterns. Once programmed, this cell prevents further read access to the functional bits in the device ...
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... Power-Up Reset INTERNAL REGISTER FEEDBACK/EXTERNAL OUTPUT REGISTER Circuitry within the GAL20LV8ZD provides a reset signal to all reg- isters during power-up. All internal registers will have their Q out- t puts set low after a specified time ( pr MAX result, the state on the registered output pins (if they are enabled) will always be high on power-up, regardless of the programmed polarity of the output pins ...
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... Delta Tpd Outputs 0 -0.25 -0.5 -0. Number of Outputs Switching Delta Tpd vs Output Loading 12 10 RISE 8 FALL 100 Output Loading (pF) Specifications GAL20LV8ZD Normalized Tco vs Vcc 1.2 RISE 1.1 FALL 1 0.9 0.8 3.00 3.15 3.30 3.45 Supply Voltage (V) Normalized Tco vs Temp 1.3 RISE 1.2 FALL 1.1 1 0.9 0.8 0.7 Temperature (deg. C) Delta Tco Outputs ...
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... Typical AC and DC Characteristics Vol vs Iol 1.5 1.25 1 0.75 0.5 0.25 0 0.00 20.00 40.00 60.00 Iol (mA) Normalized Icc vs Vcc 1.30 1.20 1.10 1.00 0.90 0.80 0.70 3.00 3.15 3.30 3.45 Supply Voltage (V) Delta Icc vs Vin (1 input 0.00 0.50 1.00 1.50 2.00 2.50 3.00 Vin (V) Specifications GAL20LV8ZD Voh vs Ioh 3 2.5 2 1.5 1 0.5 0 0.00 10.00 20.00 30.00 40.00 80.00 Ioh(mA) Normalized Icc vs Temp 1.2 1.15 1.1 1.05 1 0.95 0.9 3.60 -55 - Temperature (deg. C) Input Clamp (Vik ...