GAL20RA10 LATTICE [Lattice Semiconductor], GAL20RA10 Datasheet
GAL20RA10
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GAL20RA10 Summary of contents
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... The generic architecture provides maximum design flexibility by allowing the Output Logic Macrocell (OLMC configured by the user. The GAL20RA10 is a direct parametric compatible CMOS replacement for the PAL20RA10 device. Unique test circuitry and reprogrammable cells allow complete AC, DC, and functional testing during manufacturing ...
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... GAL20RA10 Ordering Information Commercial Grade Specifications Industrial Grade Specifications ...
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... Parallel Flip-Flop Preload The flip-flops of a GAL20RA10 can be reset or preset from the I/O pins by applying a logic low to the preload pin (pin 1 on DIP package / pin 2 on PLCC package) and applying the desired logic level to each I/O pin ...
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... Output Logic Macrocell Diagram PL OE Output Logic Macrocell Configuration (Registered With Polarity Output Logic Macrocell Configuration (Combinatorial With Polarity) OE Specifications GAL20RA10 XOR ( XOR (n) XOR ( ...
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... GAL20RA10 Logic Diagram 1 ( 280 2 (3) 320 600 3 (4) 640 920 4 (5) 960 1240 5 (6) 1280 1560 6 (7) 1600 1880 7 (9) 1920 2200 8 (10) 2240 2520 9 (11) 2560 2840 10 (12) 2880 3160 11 (13) Byte7 Byte6 .... MSB Specifications GAL20RA10 DIP (PLCC) Package Pinouts ...
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... The leakage current is due to the internal pull-up resistor on all pins. See Input Buffer section for more information. 2) One output at a time for a maximum duration of one second. Vout = 0.5V was selected to avoid test problems caused by tester ground degradation. Characterized but not 100% tested. 3) Typical values are at Vcc = 5V and T Specifications GAL20RA10B Recommended Operating Conditions (1) Commercial Devices: +1 ...
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... Preload Hold Time 1) Refer to Switching Test Conditions section. 2) Refer to fmax Descriptions section. Capacitance ( 1.0 MHz) A SYMBOL PARAMETER C Input Capacitance I C I/O Capacitance I/O *Characterized but not 100% tested. Specifications GAL20RA10B Over Recommended Operating Conditions COM COM -7 -10 MIN. MAX. MIN. MAX ...
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... Input or I/O to Output Enable/Disable t wh CLK Clock Width ALL I/O PINS Parallel Preload OE t dis OUTPUT OE to Enable / Disable Specifications GAL20RA10 INPUT or VALID INPUT I/O FEEDBACK t pd CLK REGISTERED OUTPUT t en INPUT or I/O FEEDBACK Q-OUTPUT OF REGISTER t wl REGISTERED OUTPUT PIN Q-OUTPUT OF REGISTER REGISTERED ...
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... Output Load Conditions (see figure) Test Condition 470 B Active High Active Low 470 C Active High Active Low 470 Specifications GAL20RA10 su+ co) GND to 3.0V 2ns 10% – 90% 3ns 10% – 90% 1.5V 1.5V See Figure FROM OUTPUT (O/Q) UNDER TEST R ...
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... NOTE: The electronic signature bits if programmed to any value other then zero(0) will alter the checksum of the device. Security Cell A security cell is provided in every GAL20RA10 device as a deter- rent to unauthorized copying of the device pattern. Once pro- grammed, this cell prevents further read access of the device pattern information ...
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... Q - OUTPUT FEEDBACK/EXTERNAL OUTPUT REGISTER Circuitry within the GAL20RA10 provides a reset signal to all reg- isters during power-up. All internal registers will have their Q outputs set low after a specified time (tpr MAX result, the state on the registered output pins (if they are enabled) will be high on power-up, because of the inverting buffer on the output pins ...
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... Temperature (deg. C) Delta Tpd Outputs Switching 0 -0 Number of Outputs Switching Delta Tpd vs Output Loading 8 6 RISE 4 FALL Output Loading (pF) Specifications GAL20RA10 Normalized Tco vs Vcc 1.2 1.1 1 0.9 0.8 4.50 4.75 5.00 5.25 Supply Voltage (V) Normalized Tco vs Temp 1.3 1.2 1.1 1 0.9 0.8 0.7 Temperature (deg. C) Delta Tco Outputs 0 -0.5 -1 -1.5 ...
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... Vol vs Iol 1 0.8 0.6 0.4 0 Iol (mA) Normalized Icc vs Vcc 1.2 1.1 1 0.9 0.8 4.50 4.75 5.00 5.25 Supply Voltage (V) Delta Icc vs Vin (1 input 0.20 0.70 1.20 1.70 2.20 2.70 3.20 3.70 Vin (V) Specifications GAL20RA10 Voh vs Ioh Ioh(mA) Normalized Icc vs Temp 1.3 1.2 1.1 1 0.9 0.8 0.7 5.50 Temperature (deg. C) Input Clamp (Vik ...
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... Delta Tpd Outputs 0 -0.2 -0.4 -0.6 -0 Number of Outputs Switching Delta Tpd vs Output 12 RISE 10 8 FALL 100 Output Loading (pF) Specifications GAL20RA10 Normalized Tco vs Vcc 1.1 1.05 1 0.95 0.9 4.50 4.75 5.00 5.25 Supply Voltage (V) Normalized Tco vs Temp 1.3 RISE 1.2 FALL 1.1 1 0.9 0.8 0.7 Temperature (deg. C) Delta Tco Outputs Switching 0 -0.2 -0.4 -0 ...
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... Iol (mA) Normalized Icc vs Vcc 1.20 1.10 1.00 0.90 0.80 4.50 4.75 5.00 5.25 5.50 Supply Voltage (V) Delta Icc vs Vin (1 input 0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 Vin (V) Specifications GAL20RA10 Voh vs Ioh 0.00 10.00 20.00 30.00 40.00 50.00 60.00 Ioh(mA) Normalized Icc vs Temp 1.2 1.1 1 0.9 0.8 Temperature (deg. C) Input Clamp (Vik -2.00 -1.00 0.00 Vik (V) 15 Voh vs Ioh 3 ...