AS7C1025 ALSC [Alliance Semiconductor Corporation], AS7C1025 Datasheet - Page 2

• Manufacturer Part Number: AS7C1025
• Description: 5V/3.3V 128K x8 CMOS SRAM (Revolutionary pinout)
• Manufacturer: ALSC [Alliance Semiconductor Corporation]

Functional description
The AS7C1025 and AS7C31025 are high-performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) devices
organized as 131,072 words × 8 bits. They are designed for memory applications where fast data access, low power, and
simple interfacing are desired.
Equal address access and cycle times (t
for high-performance applications. The chip enable input CE permits easy memory and expansion with multiple-bank
memory systems.
When
consumption in standby mode, and typically requires only 5 mW . Both devices also offer 2.0V data retention.
A write cycle is accomplished by asserting write enable (
written on the rising edge of
I/O pins only after outputs have been disabled with
A read cycle is accomplished by asserting output enable (
drive I/O pins with the data word referenced by the input address. When either chip enable or output enable is inactive, or
write enable is active, output drivers stay in high-impedance mode.
All chip inputs and outputs are TTL-compatible, and operation is from a single 5V supply (AS7C1025) or 3.3V supply
(AS7C31025). The AS7C1025 and AS7C31025 are packaged in common industry standard packages.
Absolute maximum ratings
NOTE: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect reliability.
Truth table
Key: X = Don’t Care, L = Low, H = High
3/23/01; v.1.0
Voltage on V
Voltage on any pin relative to GND
Power dissipation
Storage temperature (plastic)
Ambient temperature with V
DC current into outputs (low)
CE
CE
H
L
L
L
is high the devices enter standby mode. The standard AS7C1025 is guaranteed not to exceed 27.5 mW power
CC
relative to GND
Parameter
WE
H
H
X
L
CC
WE
applied
(write cycle 1) or
AA
, t
OE
H
X
X
L
RC
Alliance Semiconductor
, t
WC
) of 12/15/20 ns with output enable access times (t
output enable (
CE
(write cycle 2). To avoid bus contention, external devices should drive
AS7C31025
AS7C1025
OE
WE
Device
) and chip enable (
) and chip enable (
OE
High Z
High Z
) or write enable
D
Data
®
D
OUT
IN
Symbol
I
T
T
V
V
V
OUT
P
bias
stg
t1
t1
t2
D
CE
(
WE
CE
), with write enable (
).
). Data on the input pins I/O0-I/O7 is
–0.50
–0.50
–0.50
Min
–65
–55
–
–
Output disable (I
Standby (I
V
Write (I
OE
Read (I
CC
+150
+125
+7.0
+5.0
) of 6,7,8 ns are ideal
Max
Mode
1.0
WE
20
+ 0.5
) high. The chips
AS7C31025
SB
CC
CC
, I
AS7C1025
)
)
SB1
P. 2 of 9
CC
)
)
Unit
mA
o
o
W
V
V
V
C
C