AS7C1026-12 ALSC [Alliance Semiconductor Corporation], AS7C1026-12 Datasheet

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AS7C1026-12

Manufacturer Part Number
AS7C1026-12
Description
5V/3.3V 64Kx6 CMOS SRAM
Manufacturer
ALSC [Alliance Semiconductor Corporation]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AS7C1026-12JC
Manufacturer:
ATMEL
Quantity:
1 000
Part Number:
AS7C1026-12JI
Manufacturer:
ATMEL
Quantity:
5 530
Features
• AS7C1026 (5V version)
• AS7C31026 (3.3V version)
• Industrial and commercial versions
• Organization: 65,536 words x 16 bits
• Center power and ground pins for low noise
• High speed
• Low power consumption: ACTIVE
Logic block diagram
Selection guide
Shaded areas indicate preliminary information.
Maximum address access time
Maximum output enable access time
Maximum operating current
Maximum CMOS standby current
May 2000
- 10/12/15/20 ns address access time
- 5/6/8/10 ns output enable access time
- 880 mW (AS7C1026) / max @ 12 ns
- 396 mW (AS7C31026) / max @ 12 ns
WE
UB
DID 11-20011-A. 5/22/00
OE
LB
CE
I/O8–I/O15
I/O0–I/O7
A0
A1
A2
A3
A4
A5
A6
A7
buffer
I/O
Column decoder
Control circuit
64K × 16
Array
AS7C31026
AS7C31026
ALLIANCE SEMICONDUCTOR
AS7C1026
AS7C1026
5V/3.3V 64K×16 CMOS SRAM
V
GND
CC
AS7C31026-10
Pin arrangement
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
GND
A15
A14
A13
A12
V
WE
NC
44-Pin SOJ, TSOP II (400 mil)
A4
A3
A2
A1
A0
CE
CC
125
10
5
3
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
• Low power consumption: STANDBY
• 2.0V data retention
• Easy memory expansion with CE, OE inputs
• TTL-compatible, three-state I/O
• JEDEC standard packaging
• ESD protection
• Latch-up current
- 28 mW (AS7C1026) / max CMOS I/O
- 18 mW (AS7C31026) / max CMOS I/O
- 44-pin 400 mil SOJ
- 44-pin 400 mil TSOP II
- 48-ball 6 mm × 8 mm CSP mBGA
AS7C31026-12
®
AS7C1026-12
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
160
110
12
OE
A5
A6
A7
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
V
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
NC
3
6
3
CC
48-CSP mini Ball-Grid-Array Package
D
G I/O15 NC
H
A
B
C
E
F I/O14 I/O13 A14
2000 volts
AS7C31026-15
AS7C1026-15
200 mA
I/O8
I/O9 I/O10
V
V
NC
LB
1
DD
SS
Copyright ©1999 Alliance Semiconductor. All rights reserved.
150
100
15
8
3
3
I/O11 NC
I/O12 NC
OE
UB
A8
2
A12
A3
A5
A9
A
AS7C31026-20
3
AS7C1026-20
0
140
A15 I/O5 I/O6
A13 WE I/O7
A10 A11
90
20
10
NC I/O4
A4
A6 I/O1 I/O2
A7 I/O3 V
A
3
3
4
1
AS7C31026
AS7C1026
1
CE
A
5
2
Unit
I/O0
mA
mA
mA
mA
ns
ns
NC
V
NC
6
DD
SS

Related parts for AS7C1026-12

AS7C1026-12 Summary of contents

Page 1

... A15 19 26 A14 20 25 A13 21 24 A12 AS7C1026-12 AS7C31026-10 AS7C31026- AS7C1026 – 160 AS7C31026 125 110 AS7C1026 – AS7C31026 3 ALLIANCE SEMICONDUCTOR AS7C1026 AS7C31026 2000 volts 200 48-CSP mini Ball-Grid-Array Package ...

Page 2

... AA are ideal for high-performance applications. When CE is high the devices enter stanby mode. The AS7C1026 is guaranteed not to exceed 28 mW power consumption in CMOS standby mode. The devices also offer 2.0V data retention. A write cycle is accomplished by asserting write enable (WE) and chip enable (CE). Data on the input pins I/O0–I/O15 is written on the rising edge of WE (write cycle (write cycle 2) ...

Page 3

... Min Max Min Max Min Max – – AS7C1026 – IL AS7C31026 – 125 = 1 AS7C1026 – IL AS7C31026 – 1 –0.2V, AS7C1026 – CC AS7C31026 – 10 –0.2V Min – 0 Min 2 NOMINAL) CC Symbol Signals C A, CE, WE, OE, LB I/O I/O ALLIANCE SEMICONDUCTOR AS7C1026 AS7C31026 I/O8–I/O15 ...

Page 4

... AS7C1026 AS7C31026 Read cycle (over the operating range) Parameter Read cycle time Address access time Chip enable (CE) access time Output enable (OE) access time Output hold from address change CE Low to output in low Z CE High to output in high Z OE Low to output in low Z Byte select access time ...

Page 5

... Data undefined Data undefined ALLIANCE SEMICONDUCTOR AS7C1026 AS7C31026 -15 -20 Unit Notes 15 – 20 – – 13 – – 12 – – 0 – – 12 – – ...

Page 6

... AS7C1026 AS7C31026 Data retention characteristics (over the operating range) Parameter V for data retention CC Data retention current Chip deselect to data retention time Operation recovery time Input leakage current Data retention waveform test conditions - Output load: see Figure B or Figure C, except as noted. ...

Page 7

... OL vs. output voltage V OL 140 (NOMINAL 120 100 Output voltage (V) ALLIANCE SEMICONDUCTOR AS7C1026 AS7C31026 Normalized supply current I SB vs. ambient temperature T 625 (NOMINAL 0.2 0.04 -55 - 125 Ambient temperature (°C) Normalized supply current I vs ...

Page 8

... AS7C1026 AS7C31026 Package dimensions 44434241403938 373635 343332 31 3029 2827 2625 44-pin TSOP 11121314 1516 1718 1920 44-pin SOJ Pin Seating b Plane 8 ® 0– ...

Page 9

... FBGA Ball Die Maximum – 8.10 – 8.10 – – – 1.20 – 0.27 – 0.08 ALLIANCE SEMICONDUCTOR AS7C1026 AS7C31026 Top View Ball #A1 index SRAM DIE Elastomer B Detail View Die 0.3/T p Notes 1 Bump counts row x 6 column). 2 Pitch: (x, 0.75 mm (typ). 3 Units: millimeters. ...

Page 10

... Blank=5V CMOS Device prefix 3=3.3V CMOS number 10 ® AS7C1026-12JC NA AS7C1026-12JI NA AS7C1026-12TC NA AS7C31026-12TI AS7C31026-15TI AS7C31026-20TI NA AS7C1026-12BC NA AS7C31026-12BI AS7C31026-15BI AS7C31026-20BI –XX X Package: J=SOJ 400 mil Access T=TSOP type 2, 18.4 × 10.2 mm time B=CSP BGA, 8 × ALLIANCE SEMICONDUCTOR AS7C1026-15JC AS7C1026-20JC AS7C1026-15JI AS7C1026-20JI AS7C1026-15TC ...

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