AS7C1028 ALSC [Alliance Semiconductor Corporation], AS7C1028 Datasheet

AS7C1028

Manufacturer Part Number

AS7C1028

Description

5V 256K X 4 CMOS SRAM (Common I/O)

Manufacturer

ALSC [Alliance Semiconductor Corporation]

Datasheet

1.AS7C1028.pdf (8 pages)

Current page: 1 of 8
Download datasheet (120Kb)

12/5/06; V.1.0

Logic block diagram

Features

• Industrial (-40

• Organization: 262,144 words × 4 bits

• High speed

• Low power consumption via chip deselect

• One chip select plus one Output Enable pin

• Bidirectional data inputs and outputs

• TTL-compatible

GND

- 12 ns address access time

- 6 ns output enable access time

September 2006

Advance Information

to 85

Address decoder

Input buffer

262,144 x 4

(262,144)

Array

C) temperature

5V 256K X 4 CMOS SRAM (Common I/O)

Control

circuit

Alliance Memory

I/O3

I/O0

Pin arrangement

• 28-pin JEDEC standard packages

• ESD protection ≥ 2000 volts

- 400 mil SOJ

GND

A10

28 Pin SOJ (400 mil)

AS7C1028

P. 1 of 8

A17

A16

A15

A14

A13

A12

A11

I/O3

I/O2

I/O1

I/O0

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