AT89C5131-PLTIL ATMEL Corporation, AT89C5131-PLTIL Datasheet - Page 93
AT89C5131-PLTIL
Manufacturer Part Number
AT89C5131-PLTIL
Description
8-bit Flash Microcontroller with Full Speed USB Device
Manufacturer
ATMEL Corporation
Datasheet
1.AT89C5131-PLTIL.pdf
(176 pages)
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Figure 42. Data Transmission Format (CPHA = 0)
Figure 43. Data Transmission Format (CPHA = 1)
Figure 44. CPHA/SS Timing
4136B–USB–09/03
MOSI (from Master)
SCK cycle number
MISO (from Slave)
MOSI (from Master)
SCK (CPOL = 0)
SCK (CPOL = 1)
MISO (from Slave)
SCK cycle number
SPEN (internal)
SCK (CPOL = 0)
SCK (CPOL = 1)
Capture point
SPEN (internal)
SS (to Slave)
Capture point
SS (to Slave)
MISO/MOSI
(CPHA = 0)
(CPHA = 1)
Master SS
Slave SS
Slave SS
As shown in Figure 43, the first SCK edge is the MSB capture strobe. Therefore the
Slave must begin driving its data before the first SCK edge, and a falling edge on the SS
pin is used to start the transmission. The SS pin must be toggled high and then low
between each byte transmitted (Figure 40).
Figure 44 shows an SPI transmission in which CPHA is’1’. In this case, the Master
begins driving its MOSI pin on the first SCK edge. Therefore the Slave uses the first
SCK edge as a start transmission signal. The SS pin can remain low between transmis-
sions (Figure 39). This format may be preferable in systems having only one Master and
only one Slave driving the MISO data line.
MSB
MSB
MSB
1
MSB
1
2
bit6
bit6
2
bit6
Byte 1
bit6
3
bit5
bit5
3
bit5
bit5
bit4
bit4
4
bit4
bit4
4
Byte 2
bit3
bit3
5
bit3
bit3
5
6
bit2
bit2
6
bit2
bit2
Byte 3
7
bit1
bit1
7
bit1
bit1
LSB
8
LSB
LSB
8
LSB
AT89C5131
93
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