24C01C MicrochipTechnology, 24C01C Datasheet

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24C01C

Manufacturer Part Number
24C01C
Description
1K5.0VI2CSerialEEPROM
Manufacturer
MicrochipTechnology
Datasheet

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FEATURES
• Single supply with operation from 4.5 to 5.5V
• Low power CMOS technology
• Organized as a single block of 128 bytes (128 x 8)
• 2-wire serial interface bus, I
• 100kHz and 400 kHz compatibility
• Page-write buffer for up to 16 bytes
• Self-timed write cycle (including auto-erase)
• Fast 1 mS write cycle time for byte or page mode
• Address lines allow up to eight devices on bus
• 1,000,000 erase/write cycles guaranteed
• ESD protection > 4,000V
• Data retention > 200 years
• 8-pin PDIP, SOIC or TSSOP packages
• Available for extended temperature ranges
DESCRIPTION
The Microchip Technology Inc. 24C01C is a 1K bit
Serial Electrically Erasable PROM with a voltage range
of 4.5V to 5.5V. The device is organized as a single
block of 128 x 8-bit memory with a 2-wire serial inter-
face. Low current design permits operation with typical
standby and active currents of only 10 A and 1 mA
respectively. The device has a page-write capability for
up to 16 bytes of data and has fast write cycle times of
only 1 mS for both byte and page writes. Functional
address lines allow the connection of up to eight
24C01C devices on the same bus for up to 8K bits of
contiguous EEPROM memory. The device is available
in the standard 8-pin PDIP, 8-pin SOIC (150 mil), and
TSSOP packages.
M
I
2
C is a trademark of Philips Corporation.
- 1 mA active current typical
- 10 A standby current typical at 5.5V
- Commercial (C):
- Industrial (I):
- Automotive (E)
1997 Microchip Technology Inc.
-40 C to
-40 C to +125 C
1K 5.0V I
0 C to
2
C compatible
+70 C
+85 C
2
C
Preliminary
Serial EEPROM
PACKAGE TYPES
BLOCK DIAGRAM
SDA SCL
PDIP/SOIC
TSSOP
A0 A1 A2
Control
Logic
Vcc
I/O
Vss
V
Vss
A0
A1
A2
SS
A0
A1
A2
Memory
Control
Logic
1
2
3
4
1
2
3
4
24C01C
XDEC
8
7
6
5
8
7
6
5
SENSE AMP
R/W CONTROL
HV Generator
DS21201A-page 1
EEPROM
Vcc
TEST
SCL
SDA
YDEC
Array
V
TEST
SCL
SDA
CC

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24C01C Summary of contents

Page 1

... Functional address lines allow the connection eight 24C01C devices on the same bus for bits of contiguous EEPROM memory. The device is available in the standard 8-pin PDIP, 8-pin SOIC (150 mil), and TSSOP packages ...

Page 2

... ELECTRICAL CHARACTERISTICS 1.1 Maximum Ratings* V ........................................................................ 7.0V CC All inputs and outputs w.r.t. V ...... -0. Storage temperature ...........................-65˚C to +150˚C Ambient temp. with power applied.......-65˚C to +125˚C Soldering temperature of leads (10 seconds) ...+300˚C ESD protection on all pins *Notice: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device ...

Page 3

... Schmitt trigger inputs which provide improved noise T HIGH DAT SU DAT T AA Preliminary 24C01C +70 C Units Remarks kHz (Note 1) ns (Note 1) ns After this period the first clock pulse is generated ns Only relevant for repeated ...

Page 4

... The levels on these inputs are compared with the cor- responding bits in the slave address. The chip is selected if the compare is true eight 24C01C devices may be connected to the same bus by using different chip select bit combina- tions. These inputs must be connected to either V V ...

Page 5

... The master device must generate an extra clock pulse which is associated with this acknowledge bit. Note: The 24C01C does not generate any acknowledge bits if an internal program- ming cycle is in progress. The device that acknowledges has to pull down the ...

Page 6

... Multiple Devices The chip select bits A2, A1, A0 can be used to expand the contiguous address space for bits by add- ing up to eight 24C01C devices on the same bus. In this case, software can use A0 of the control byte as address bit A8 address bit A9, and A2 as address bit A10 ...

Page 7

... Page Write The write control byte, word address and the first data byte are transmitted to the 24C01C in the same way byte write. But instead of generating a stop condi- tion, the master transmits additional data bytes to the 24C01C which are temporarily stored in the on- chip page buffer and will be written into the memory after the master has transmitted a stop condition ...

Page 8

... ACKNOWLEDGE POLLING Since the device will not acknowledge during a write cycle, this can be used to determine when the cycle is complete (this feature can be used to maximize bus throughput). Once the stop condition for a write com- mand has been issued from the master, the device ini- tiates the internally timed write cycle ...

Page 9

... Then the master issues the control byte again but with the R/W bit set to a one. The 24C01C will then issue an acknowledge and transmits the eight bit data word. The master will not acknowledge the transfer but does generate a stop condition and the 24C01C dis- continues transmission (Figure 8-2) ...

Page 10

... NOTES: DS21201A-page 10 Preliminary 1997 Microchip Technology Inc. ...

Page 11

... PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. 24C01C — /P Package: Temperature Range: Device: Sales and Support Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom- mended workarounds ...

Page 12

W ORLDWIDE AMERICAS Corporate Office Microchip Technolog y Inc. 2355 W est Chandler Blvd. Chandle 85224-6199 Tel : 602-786-7200 F ax: 602-786-7277 Technical Support: 602 786-7627 Web: http://ww w.microchi p.com Atlanta Microchip Technolog y Inc. 500 Sugar ...

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