24LC256 MicrochipTechnology, 24LC256 Datasheet - Page 8

• Manufacturer Part Number: 24LC256
• Description: 256KI2CCMOSSerialEEPROM
• Manufacturer: MicrochipTechnology

24AA256/24LC256
7.0
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (This feature can be used to maximize bus
throughput.) Once the stop condition for a write com-
mand has been issued from the master, the device ini-
tiates the internally timed write cycle. ACK polling can
be initiated immediately. This involves the master send-
ing a start condition, followed by the control byte for a
write command (R/W = 0). If the device is still busy with
the write cycle, then no ACK will be returned. If no ACK
is returned, then the start bit and control byte must be
resent. If the cycle is complete, then the device will
return the ACK, and the master can then proceed with
the next read or write command. See Figure 7-1 for
flow diagram.
DS21203C-page 8
ACKNOWLEDGE POLLING
FIGURE 7-1:
Initiate Write Cycle
Send Control Byte
Write Command
with R/W = 0
Condition to
Acknowledge
Send Stop
Send Start
ACKNOWLEDGE POLLING
FLOW
Did Device
(ACK = 0)?
Operation
Send
Next
YES
1998 Microchip Technology Inc.
NO