RD48F2000P0ZBQ0 Intel Corporation, RD48F2000P0ZBQ0 Datasheet

RD48F2000P0ZBQ0

Manufacturer Part Number

RD48F2000P0ZBQ0

Description

Intel StrataFlash Embedded Memory

Manufacturer

Intel Corporation

Datasheet

1.RD48F2000P0ZBQ0.pdf (102 pages)

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Intel StrataFlash

(P30)

1-Gbit P30 Family

Product Features

The Intel StrataFlash

StrataFlash

brings reliable, two-bit-per-cell storage technology to the embedded flash market segment.

Benefits include more density in less space, high-speed interface, lowest cost-per-bit NOR

device, and support for code and data storage. Features include high-performance synchronous-

burst read mode, fast asynchronous access times, low power, flexible security options, and three

industry standard package choices.

The P30 product family is manufactured using Intel

High performance

Architecture

Voltage and Power

Quality and Reliability

— 85/88 ns initial access

— 40 MHz with zero wait states, 20 ns clock-to-

— 25 ns asynchronous-page read mode

— 4-, 8-, 16-, and continuous-word burst mode

— Buffered Enhanced Factory Programming

— 1.8 V buffered programming at 7 µs/byte (Typ)

— Multi-Level Cell Technology: Highest Density

— Asymmetrically-blocked architecture

— Four 32-KByte parameter blocks: top or

— 128-KByte main blocks

— V

— Standby current: 55 µA (Typ) for 256-Mbit

— 4-Word synchronous read current:

— Operating temperature: –40 °C to +85 °C

— Minimum 100,000 erase cycles per block

— ETOX™ VIII process technology (130 nm)

data output synchronous-burst read mode

(BEFP) at 5 µs/byte (Typ)

at Lowest Cost

bottom configuration

13 mA (Typ) at 40 MHz

• 1-Gbit in SCSP is –30 °C to +85 °C

CCQ

(core) voltage: 1.7 V – 2.0 V

(I/O) voltage: 1.7 V – 3.6 V

memory devices. Offered in 64-Mbit up through 1-Gbit densities, the P30 device

Embedded Memory (P30) product is the latest generation of Intel

Embedded Memory

Security

Software

Density and Packaging

— One-Time Programmable Registers:

— Selectable OTP Space in Main Array:

— Absolute write protection: V

— Power-transition erase/program lockout

— Individual zero-latency block locking

— Individual block lock-down

— 20 µs (Typ) program suspend

— 20 µs (Typ) erase suspend

— Intel

— Basic Command Set and Extended Command

— Common Flash Interface capable

— 64/128/256-Mbit densities in 56-Lead TSOP

— 64/128/256/512-Mbit densities in 64-Ball

— 64/128/256/512-Mbit and 1-Gbit densities in

— 16-bit wide data bus

130 nm ETOX™ VIII process technology.

• 64 unique factory device identifier bits

• 64 user-programmable OTP bits

• Additional 2048 user-programmable OTP bits

• 4x32KB parameter blocks + 3x128KB main

blocks (top or bottom configuration)

Set compatible

package

Intel

Order Number: 306666, Revision: 001

Flash Data Integrator optimized

Easy BGA package

QUAD+ SCSP

Datasheet

= V

April 2005

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