ST62T15C ST Microelectronics, ST62T15C Datasheet
ST62T15C
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ST62T15C Summary of contents
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... One external Non-Maskable Interrupt ST626x-EMU2 Emulation and Development System (connects to an MS-DOS PC via a parallel port). DEVICE SUMMARY OTP EPROM DEVICE (Bytes) (Bytes) ST62T15C 1836 - ST62T25C 3884 - ST62E25C 3884 August 1999 ST62T15C/T25C/E25C PDIP28 PS028 I/O Pins CDIP28W 20 (See end of Datasheet for Ordering Information SS0P28 Rev. 2.8 1/70 1 ...
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... ST62T15C/T25C/E25C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1 GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.2 PIN DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.3 MEMORY MAP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.3.2 Program Space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.3.3 Data Space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.3.4 Stack Space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.3.5 Data Window Register (DWR 1.4 PROGRAMMING MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.4.1 Option Bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 1.4.2 Program Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 1.4.3 EPROM Erasing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2 CENTRAL PROCESSING UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.1 INTRODUCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2.2 CPU REGISTERS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3 CLOCKS, RESET, INTERRUPTS AND POWER SAVING MODES . . . . . . . . . . . . . . . . . . . . . 14 3 ...
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Safe I/O State Switching Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ...
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... The ST62E25C is the erasable EPROM version of the ST62T15C,T25C device, which may be used to emulate the ST62T15C,T25C device, as well as the respective ST6215C,25C ROM devices. OTP and EPROM devices are functionally identi- cal. The ROM based versions offer the same func- tionality selecting as ROM options the options de- Figure 1 ...
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... Each line may be configured under soft- ware control as inputs with or without internal pull- up resistors, interrupt generating inputs with pull- up resistors, open-drain or push-pull outputs analog inputs for the A/D converter. for nor- SS Figure 2. ST62T15C,T25C and E25C Pin Configuration TIMER 2 OSCin ...
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... ST62T15C/T25C/E25C 1.3 MEMORY MAP 1.3.1 Introduction The MCU operates in three separate memory spaces: Program space, Data space, and Stack space. Operation in these three memory spaces is described in the following paragraphs. Figure 3. Memory Addressing Diagram PROGRAM SPACE 0000h PROGRAM MEMORY 0FF0h INTERRUPT & RESET VECTORS ...
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... NMI VECTOR 0FFDh 0FFEh USER RESET VECTOR 0FFFh (*) Reserved areas should be filled with 0FFh ST62T15C/T25C/E25C In the EPROM parts, READOUT PROTECTION option can be disactivated only by U.V. erasure that also results into the whole EPROM context erasure. Note: Once the Readout Protection is activated longer possible, even for STMicroelectronics, to gain access to the OTP contents ...
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... ST62T15C/T25C/E25C MEMORY MAP (Cont’d) 1.3.3 Data Space Data Space accommodates all the data necessary for processing the user program. This space com- prises the RAM resource, the processor core and peripheral registers, as well as read-only data such as constants and look-up tables in OTP/ EPROM ...
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... DWR is not affected PROGRAM SPACE ADDRESS ST62T15C/T25C/E25C 0 READ DATA SPACE ADDRESS : 40h-7Fh IN INSTRUCTION DATA SPACE ADDRESS : 59h VR01573C 9/70 9 ...
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... ST62T15C/T25C/E25C 1.4 PROGRAMMING MODES 1.4.1 Option Bytes The two Option Bytes allow configuration capabili the MCUs. Option byte’s content is automati- cally read, and the selected options enabled, when the chip reset is activated. It can only be accessed during the programming mode. This access is made either automatically ...
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... PROGRAMMING MODES (Cont’d) 1.4.2 Program Memory EPROM/OTP programming mode is set by a +12.5V voltage applied to the TEST/V programming flow of the ST62T15C,T25C/E25C is described in the User Manual of the EPROM Pro- gramming Board. Table 2. ST62T15C Program Memory Map Device Address Description 0000h-087Fh Reserved 0880h-0F9Fh User ROM ...
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... ST62T15C/T25C/E25C 2 CENTRAL PROCESSING UNIT 2.1 INTRODUCTION The CPU Core of ST6 devices is independent of the I/O or Memory configuration. As such, it may be thought independent central processor communicating with on-chip I/O, Memory and Pe- ripherals via internal address, data, and control buses. In-core communication is arranged as shown in Figure 6; the controller being externally ...
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... Switching between the three sets of flags is per- formed automatically when an NMI, an interrupt or a RETI instructions occurs. As the NMI mode is ST62T15C/T25C/E25C automatically selected after the reset of the MCU, the ST6 core uses at first the NMI flags. Stack. The ST6 CPU includes a true LIFO hard- ware stack which eliminates the need for a stack pointer ...
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... ST62T15C/T25C/E25C 3 CLOCKS, RESET, INTERRUPTS AND POWER SAVING MODES 3.1 CLOCK SYSTEM The MCU features a Main Oscillator which can be driven by an external clock, or used in conjunction with an AT-cut parallel resonant crystal or a suita- ble ceramic resonator, or with an external resistor ( addition, a Low Frequency Auxiliary Os- ...
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... For precise timing measurements not recom- mended to use the OSG and it should not be ena- bled in applications that use the SPI or the UART. It should also be noted that power consumption in Stop mode is higher when the OSG is enabled (around nominal conditions and room temperature). ST62T15C/T25C/E25C , is limited to INT ), DD 15/70 15 ...
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... ST62T15C/T25C/E25C CLOCK SYSTEM (Cont’d) Figure 9. OSG Filtering Principle (1) (2) (3) (4) (1) Maximum Frequency for the device to work correctly (2) Actual Quartz Crystal Frequency at OSCin pin (3) Noise from OSCin (4) Resulting Internal Frequency Figure 10. OSG Emergency Oscillator Principle Main Oscillator Emergency Oscillator Internal Frequency ...
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... When the OSG is enabled, access to this area is prevented. The internal frequency is kept When the OSG is disabled, operation in this area is not guaranteed When the OSG is enabled, access to this area is prevented. The internal frequency is kept at f ST62T15C/T25C/E25C POR Core : 13 TIMER 1 Watchdog : 12 ...
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... ST62T15C/T25C/E25C 3.2 RESETS The MCU can be reset in four ways: – by the external Reset input being pulled low; – by Power-on Reset; – by the digital Watchdog peripheral timing out. – by Low Voltage Detection (LVD) 3.2.1 RESET Input The RESET pin may be connected to a device of the application board in order to reset the MCU if required ...
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... RESET 3.2.5 Application Notes No external resistor is required between V the Reset pin, thanks to the built-in pull-up device. ST62T15C/T25C/E25C ues, allowing hysteresis effect. Reference value in case of voltage drop has been set lower than the reference value for power-on in order to avoid any parasitic Reset when MCU start’s running and sinking current on the supply ...
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... ST62T15C/T25C/E25C RESETS (Cont’d) 3.2.6 MCU Initialization Sequence When a reset occurs the stack is reset, the PC is loaded with the address of the Reset Vector (locat program ROM starting at address 0FFEh). A jump to the beginning of the user program must be coded at this address. Following a Reset, the In- terrupt flag is automatically set, so that the CPU is in Non Maskable Interrupt mode ...
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... Watchdog Counter Register 0D8h A/D Control Register 0D1h Address(es) Status f INT I/O are Input with pull-up I/O are Input with pull-up 00h I/O are Input with pull-up Interrupt disabled TIMER disabled Undefined As written if programmed FFh 7Fh Max count loaded FEh 40h A/D in Standby ST62T15C/T25C/E25C Comment = f ; OSG disabled OSC 21/70 21 ...
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... ST62T15C/T25C/E25C 3.3 DIGITAL WATCHDOG The digital Watchdog consists of a reloadable downcounter timer which can be used to provide controlled recovery from software upsets. The Watchdog circuit generates a Reset when the downcounter reaches zero. User software can prevent this reset by reloading the counter, and should therefore be written so that the counter is regularly reloaded while the user program runs correctly ...
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... Reset when it changes to “0”. This offers the user a choice of 64 timed periods ranging from 3,072 to 196,608 clock cycles (with an oscillator frequency of 8MHz, this is equivalent to timer peri- ods ranging from 384 s to 24.576ms). ST62T15C/T25C/E25C Figure 17. Watchdog Counter Control ...
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... ST62T15C/T25C/E25C DIGITAL WATCHDOG (Cont’d) 3.3.1 Digital Watchdog Register (DWDR) Address: 0D8h — Read/Write Reset status: 1111 1110b Bit Watchdog Control bit If the hardware option is selected, this bit is forced high and the user cannot change it (the Watchdog is always active). When the software option is se- ...
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... STOP/WAIT modes. Figure 19. Digital Watchdog Block Diagram RESET Q RSFF S R DB0 Figure 18. A typical circuit making use of the EXERNAL STOP MODE CONTROL feature SWITCH SET DB 1.7 LOAD SET 8 WRITE RESET DATA BUS ST62T15C/T25C/E25C NMI I/O VR02002 -12 OSCILLATOR CLOCK VA00010 25/70 25 ...
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... ST62T15C/T25C/E25C 3.4 INTERRUPTS The CPU can manage four Maskable Interrupt sources, in addition to a Non Maskable Interrupt source (top priority interrupt). Each source is asso- ciated with a specific Interrupt Vector which con- tains a Jump instruction to the associated interrupt service routine. These vectors are located in Pro- gram space (see Table 6) ...
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... The interrupt is serviced. – Return from interrupt (RETI) ST62T15C/T25C/E25C MCU – Automatically the MCU switches back to the nor- mal flag set (or the interrupt flag set) and pops the previous PC value from the stack. ...
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... ST62T15C/T25C/E25C INTERRUPTS (Cont’d) 3.4.3 Interrupt Option Register (IOR) The Interrupt Option Register (IOR) is used to en- able/disable the individual interrupt sources and to select the operating mode of the external interrupt inputs. This register is write-only and cannot be accessed by single-bit operations. Address: 0C8h — Write Only ...
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... CLR REG. C8H CLK Q CLR TMZ ETI EAI EOC GEN ST62T15C/T25C/E25C FFC FF6, 7) RESTART FROM STOP FF4 FF2 FF0, 1) VA0H426 29/70 29 ...
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... ST62T15C/T25C/E25C 3.5 POWER SAVING MODES The WAIT and STOP modes have been imple- mented in the ST62xx family of MCUs in order to reduce the product’s electrical consumption during idle periods. These two power saving modes are described in the following paragraphs. In addition, the Low Frequency Auxiliary Oscillator ...
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... Nevertheless, two cases must be consid- ered: – If the interrupt is a normal one, the interrupt rou- tine in which the WAIT or STOP mode was en- ST62T15C/T25C/E25C tered will be completed, starting with the execution of the instruction which follows the STOP or the WAIT instruction, and the MCU is still in the interrupt mode ...
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... ST62T15C/T25C/E25C 4 ON-CHIP PERIPHERALS 4.1 I/O PORTS The MCU features Input/Output lines which may be individually programmed as any of the following input or output configurations: – Input without pull-up or interrupt – Input with pull-up and interrupt – Input with pull-up, but without interrupt – Analog input – Push-pull output – ...
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... Mode Input With pull-up, no interrupt Input No pull-up, no interrupt Input With pull-up and with interrupt Input Analog input (when available) Output Open-drain output (20mA sink when available) Output Push-pull output (20mA sink when available) ST62T15C/T25C/E25C Optio n 33/70 33 ...
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... ST62T15C/T25C/E25C I/O PORTS (Cont’d) 4.1.2 Safe I/O State Switching Sequence Switching the I/O ports from one state to another should be done in a sequence which ensures that no unwanted side effects can occur. The recom- mended safe transitions are illustrated in Figure 23. All other transitions are potentially risky and ...
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... Bit 7-0 = Px7 - Px0: Port A, B and C Data Direction Registers bits. 4.1.5 I/O Port Data Registers DRA/B/C (C0h PA, C1h PB, C2h PC) Read/Write 0 7 Px1 Px0 Px7 Px6 Px5 Bit 7-0 = Px7 - Px0: Port A, B and C Data Regis- ters bits. Note Don’t care 0 Px1 Px0 ST62T15C/T25C/E25C 0 Px4 Px3 Px2 Px1 Px0 35/70 35 ...
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... ST62T15C/T25C/E25C I/O PORTS (Cont’d) Table 10. I/O Port Option Selections MODE AVAILABLE ON PA0-PA7 Input PB0-PB7 PC4-PC7 PA0-PA7 Input PB0-PB7 with pull up PC4-PC7 Input PA0-PA7 with pull up PB0-PB7 PC4-PC7 with interrupt PA4-PA7 Analog Input PB0-PB7 PC4-PC7 Open drain output PA4-PA7 5mA PB0-PB7 PC4-PC7 PA0-PA3 ...
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... PSI is set to “1”. The prescaler tap is selected by means of the PS2/PS1/PS0 bits in the control reg- ister. Figure 25 illustrates the Timer’s working principle. DATABUS 8 8 8-BIT b 7 COUNTER SELECT TMZ ETI 3 SYNCHRONIZATION LOGIC ST62T15C/T25C/E25C STATUS/CONTROL REGISTER TOUT DOUT PSI PS2 ...
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... ST62T15C/T25C/E25C TIMER (Cont’d) 4.2.1 Timer Operating Modes There are three operating modes, which are se- lected by the TOUT and DOUT bits (see TSCR register). These three modes correspond to the two clocks which can be connected to the 7-bit prescaler ( TIMER pin signal), and to INT the output mode ...
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... Timer Counter Register TCR Address: 0D3h — Read/Write PS1 PS0 Bit 7-0 = D7-D0: Counter Bits. Prescaler Register PSC Address: 0D2h — Read/Write Bit 7 = D7: Always read as “0”. Bit 6-0 = D6-D0: Prescaler Bits. ST62T15C/T25C/E25C PS0 Divided ...
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... ST62T15C/T25C/E25C 4.3 A/D CONVERTER (ADC) The A/D converter peripheral is an 8-bit analog to digital converter with analog inputs as alternate I/O functions (the number of which is device depend- ent), offering 8-bit resolution with a typical conver- sion time of 70us (at an oscillator clock frequency of 8MHz). The ADC converts the input voltage by a process ...
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... A/D converter if set to “1”. Writing a “0” to this bit will put the ADC in power down mode (idle mode). Bit 3-0 = D3-D0. Not used DD A/D Converter Data Register (ADR) Address: 0D0h — Read only Bit 7-0 = D7- Bit A/D Conversion Result. ST62T15C/T25C/E25C 0 PDS ...
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... ST62T15C/T25C/E25C 5 SOFTWARE 5.1 ST6 ARCHITECTURE The ST6 software has been designed to fully use the hardware in the most efficient way possible while keeping byte usage to a minimum; in short, to provide byte efficient programming capability. The ST6 core has the ability to set or clear any register or RAM location bit of the Data space with a single instruction ...
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... Data space register . Affected * . Not Affected ST62T15C/T25C/E25C Load & Store. These instructions use one, two or three bytes in relation with the addressing mode. One operand is the Accumulator for LOAD and the other operand is obtained from data memory using one of the addressing modes. ...
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... ST62T15C/T25C/E25C INSTRUCTION SET (Cont’d) Arithmetic and Logic. These instructions are used to perform the arithmetic calculations and logic operations. In AND, ADD, CP, SUB instruc- tions one operand is always the accumulator while the other can be either a data space memory con- Table 14. Arithmetic & Logic Instructions ...
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... JP abc Extended Notes: abc. 12-bit address Not Affected ST62T15C/T25C/E25C Control Instructions. The control instructions control the MCU operations during program exe- cution. Jump and Call. These two instructions are used to perform long (12-bit) jumps or subroutines call inside the whole program space. ...
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... ST62T15C/T25C/E25C Opcode Map Summary. The following table contains an opcode map for the instructions used by the ST6 LOW 0 1 0000 0001 0010 HI 2 JRNZ 4 CALL abc 0000 1 pcr 2 ext 1 2 JRNZ 4 CALL abc 0001 1 pcr 2 ext 1 2 JRNZ 4 CALL ...
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... Indicates Ill egal Instructions Cycle 5 Bit Displacement Operand 3 Bit Address 1byte dataspace address Bytes 1 byte immediate data 12 bit address Addressing Mode 8 bit Displacement ST62T15C/T25C/E25C LOW E F 1110 1111 HI JRC a,(y) 0000 prc 1 ind JRC ...
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... ST62T15C/T25C/E25C 6 ELECTRICAL CHARACTERISTICS 6.1 ABSOLUTE MAXIMUM RATINGS This product contains devices to protect the inputs against damage due to high static voltages, how- ever it is advisable to take normal precaution to avoid application of any voltage higher than the specified maximum rated voltages. For proper operation it is recommended that V ...
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... Suffix 3.6 fosc= 8MHz , 3 Suffix 4 3.0V, 1 & 6 Suffix 3. Suffix 3. & 6 Suffix 3. Suffix 4 4 & 6 Suffix version 3 Suffix version 3.6 4 4 ST62T15C/T25C/E25C Value Unit Typ. Max 125 6.0 6.0 V 6.0 6.0 4.0 4.0 MHz 8.0 4 49/70 49 ...
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... ST62T15C/T25C/E25C 6.3 DC ELECTRICAL CHARACTERISTICS (T = -40 to +125 C unless otherwise specified) A Symbol Parameter V Input Low Level Voltage IL All Input pins V Input High Level Voltage IH All Input pins (1) Hysteresis Voltage V Hys All Input pins V LVD Threshold in power- LVD threshold in powerdown dn Low Level Output Voltage ...
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... A 4 5.0V -5.0mA 3 =0mA LOAD V =5.0V DD Test Conditions 3. 4.5V DD VDD=5.0V R=47k R=100k R=470k All Inputs Pins All Outputs Pins ST62T15C/T25C/E25C Value Unit Typ. Max. 4.1 4.3 V 3 0.1 0.8 1.2 V 0.1 0.8 1.3 2 Value Unit Min. Typ. Max. 100 ms 200 400 ...
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... ST62T15C/T25C/E25C 6.5 A/D CONVERTER CHARACTERISTICS (T = -40 to +125 C unless otherwise specified) A Symbol Parameter Res Resolution (1) (2) A Total Accuracy TOT t Conversion Time C ZIR Zero Input Reading FSR Full Scale Reading Analog Input Current During AD I Conversion AC Analog Input Capacitance IN Notes: 1. Noise at VDD, VSS <10mV 2. With oscillator frequencies less than 1MHz, the A/D Converter accuracy is decreased. ...
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... Figure frequency versus Vcc . 0.1 3 3.5 Figure 29. LVD thresholds versus temperature 4 4.5 5 5.5 VDD (volts) ST62T15C/T25C/E25C R=47K R=100K R=470K 6 53/70 ...
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... ST62T15C/T25C/E25C Figure 30. Idd WAIT versus Vcc at 8 Mhz for OTP devices 1.2 1 0.8 0.6 0.4 0 This curves represents typical variations and is given for guidance only Figure 31. Idd STOP versus Vcc for OTP devices This curves represents typical variations and is given for guidance only Figure 32 ...
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... Figure 35. Idd RUN versus Vcc at 8 Mhz for ROM and OTP devices This curves represents typical variations and is given for guidance only 5V 6V Vdd 4 4.5 5 5.5 6 Vdd (volts Vdd ST62T15C/T25C/E25C 125 -40C T = 25C T = 95C T = 125C 125 C 55/70 55 ...
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... ST62T15C/T25C/E25C Figure 36. Vol versus Iol on all I/O port at Vdd= This curves represents typical variations and is given for guidance only Figure 37. Vol versus Iol on all I/O port at T= This curves represents typical variations and is given for guidance only Figure 38 ...
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... Figure 41. Voh versus Ioh on all I/O port at Vdd= This curves represents typical variations and is given for guidance only Iol (mA Ioh (mA Ioh (mA) ST62T15C/T25C/E25C 125 C Vdd = 3.0V Vdd = 4.0V Vdd = 5.0V Vdd = 6. - 125 C 57/70 57 ...
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... ST62T15C/T25C/E25C 7 GENERAL INFORMATION 7.1 PACKAGE MECHANICAL DATA Figure 42. 28-Pin Plastic Dual In-Line Package, 600-mil Width Figure 43. 28-Pin Plastic Small Outline Package, 300-mil Width 58/ Dim. Min Typ A A1 0.38 A2 3.18 B 0.36 B1 0.76 C 0.20 D 39.75 e 2.54 eA 15.24 E1 12.32 14.73 0.485 L 2.92 e3 PDIP28 e4 Number of Pins N mm Dim. Min Typ Max A 2 ...
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... PACKAGE MECHANICAL DATA (Cont’d) Figure 44. 28-Pin Ceramic Side-Brazed Dual In-Line Package Figure 45. 28-Pin Plastic Shrink Small Outline Package, 0.209” Width ST62T15C/T25C/E25C mm Dim. Min Typ Max A 4.17 A1 0.76 B 0.36 0.46 0.56 0.014 0.018 0.022 B1 0.76 1.27 1.78 0.030 0.050 0.070 C 0.20 0.25 0.38 0.008 0.010 0.015 D 34.95 35.56 36.17 1.376 1.400 1.424 D1 33.02 E1 14.61 15.11 15.62 0.575 0.595 0.615 e 2 ...
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... ST62T15C/T25C/E25C 7.2 .ORDERING INFORMATION Table 19. OTP/EPROM VERSION ORDERING INFORMATION Program Sales Type Memory (Bytes) ST62E25CF1 3884 (EPROM) ST62T15CB6 1836 (OTP) ST62T15CM6 ST62T25CB6 ST62T25CM6 3884 (OTP) ST62T25CN6 ST62T25CB3 ST62T25CM3 3884 (OTP) ST62T25CN3 60/70 60 I/O Temperature Range 0 to + 125 C Package CDIP28W PDIP28 ...
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FASTROM MCUs WITH A/D CONVERTER, OSCILLATOR SAFEGUARD, SAFE RESET AND 28 PINS 3.0 to 6.0V Supply Operating Range 8 MHz Maximum Clock Frequency -40 to +125 C Operating Temperature Range Run, Wait and Stop Modes 5 Interrupt Vectors Look-up ...
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... ST62P15C/P25C 1 GENERAL DESCRIPTION 1.1 INTRODUCTION The ST62P15C/P25C are the Factory Advanced Service Technique ROM (FASTROM) versions of ST62T15C,T25C OTP devices. They offer the same functionality as OTP devices, selecting as FASTROM options the options de- fined in the programmable option byte of the OTP version. 1.2 ORDERING INFORMATION The following section deals with the procedure for transfer of customer codes to STMicroelectronics ...
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ST62P15C/P25C FASTROM MICROCONTROLLER OPTION LIST Customer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Address . . . . ...
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ST62P15C/P25C Notes: 64/70 64 ...
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ROM MCUs WITH A/D CONVERTER, OSCILLATOR SAFEGUARD, SAFE RESET AND 28 PINS 3.0 to 6.0V Supply Operating Range 8 MHz Maximum Clock Frequency -40 to +125 C Operating Temperature Range Run, Wait and Stop Modes 5 Interrupt Vectors Look-up ...
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... ST6215C/25C 1 GENERAL DESCRIPTION 1.1 INTRODUCTION The ST6215C/25C are mask programmed ROM version of ST62T15C,T25C OTP devices. They offer the same functionality as OTP devices, selecting as ROM options the options defined in the programmable option byte of the OTP version. Figure 1. Programming wave form 0.5s min TEST 15 14V typ ...
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ST6215C/25C MICROCONTROLLER OPTION LIST Customer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Address . . . . . ...
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ST6215C/25C 1.3 ORDERING INFORMATION The following section deals with the procedure for transfer of customer codes to STMicroelectronics. 1.3.1 Transfer of Customer Code Customer code is made up of the ROM contents and the list of the selected mask options. ...
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ORDERING INFORMATION (Cont’d) Table 3. ROM version Ordering Information Sales Type ST6215CB1/XXX ST6215CB6/XXX ST6215CB3/XXX 1836 Bytes ST6215CM1/XXX ST6215CM6/XXX ST6215CM3/XXX ST6225CB1/XXX ST6225CB6/XXX ST6225CB3/XXX 3884 Bytes ST6225CM1/XXX ST6225CM6/XXX ST6225CB3/XXX ST6225CN1/XXX ST6225CN6/XXX ST6225CN3/XXX ROM Temperature Range 0 to + ...
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ST6215C/25C Notes: Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from ...