M30622 Mitsubishi, M30622 Datasheet - Page 14

• Manufacturer Part Number: M30622
• Description: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
• Manufacturer: Mitsubishi

CPU
Figure 1.5.2. Flag register (FLG)
The C, Z, S, and O flags are changed when instructions are executed. See the software manual for
details.
• Bit 7: Stack pointer select flag (U flag)
• Bits 8 to 11: Reserved area
• Bits 12 to 14: Processor interrupt priority level (IPL)
• Bit 15: Reserved area
b15
Interrupt stack pointer (ISP) is selected when this flag is “0” ; user stack pointer (USP) is selected
when this flag is “1”.
This flag is cleared to “0” when a hardware interrupt is acknowledged or an INT instruction of software
interrupt Nos. 0 to 31 is executed.
Processor interrupt priority level (IPL) is configured with three bits, for specification of up to eight
processor interrupt priority levels from level 0 to level 7.
If a requested interrupt has priority greater than the processor interrupt priority level (IPL), the interrupt
is enabled.
Tentative Specifications REV.A
S
pecifications in this manual are tentative and subject to change.
IPL
U
I
O
B
S
14
Z
D
C
b0
Carry flag
Debug flag
Zero flag
Sign flag
Register bank select flag
Overflow flag
Interrupt enable flag
Stack pointer select flag
Reserved area
Processor interrupt priority level
Reserved area
Flag register (FLG)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Mitsubishi microcomputers
M16C / 62T Group