M30622 Mitsubishi, M30622 Datasheet - Page 144

• Manufacturer Part Number: M30622
• Description: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
• Manufacturer: Mitsubishi

S I/O3, 4
UART2 Special Mode Register
Table 1.19.10. Specifications of S I/O3, 4
Note 1: n is a value from 00
Note 2: With the external clock selected:
Note 3: If the internal clock is used for the synchronous clock, the transfer clock signal stops at the “H” state.
Note 4: In M30623(80-pin package), S I/O3 is exclusive transmission, because S
Figure 1.19.30. SI/Oi related register
Transfer data format
Transfer clock
Conditions for
transmission/
reception start
Interrupt request
generation timing
Select function
• To write to the S I/Oi transmission/reception register (0360
• The S I/Oi circuit keeps on with the shift operation as long as the synchronous clock is entered in it,
Tentative Specifications REV.A
0366
external pin.
terminal. Also, to write to the bit 7 (S
so stop the synchronous clock at the instant when it counts to eight. The internal clock, if selected,
automatically stops.
Item
S
SI/Oi bit rate generator
SI/Oi transmit/receive register
b7
b7
b7
pecifications in this manual are tentative and subject to change.
16
), enter the “H” level to the CLKi terminal.
• Transfer data length: 8 bits
• With the internal clock selected (bit 6 of 0362
• With the external clock selected (bit 6 of 0362
• To start transmit/reception, the following requirements must be met:
• To use S I/Oi interrupts, the following requirements must be met:
• An interrupt occurs after counting eight transfer clock either in transmitting or
• LSB first or MSB first selection
f8/2(ni+1), f32/2(ni+1) (Note 1)
- Select the synchronous clock (use bit 6 of 036216, 036616).
- S
- S I/Oi port select bit (bit 3 of 0362
- Select the transfer direction (use bit 5 of 0362
- S I/Oi interrupt request bit (bit 3 of 0049
receiving data. (Note 3)
- In transmitting: At the time data transfer from the S I/Oi transmission/reception register finishes.
- In receiving: At the time data reception to the S I/Oi transmission/reception register finishes.
Whether transmission/reception begins with bit 0 or bit 7 can be selected.
Select a frequency dividing ratio if the internal clock has been selected (use bits
0 and 1 of 0362
16
OUT
b0
b0
Note 1: In M30623(80-package), S I/O3 is exclusive
through FF
Assuming that set value = n, BRGi divides the count
source by n + 1
Transmission/reception starts by writing data to this register.
After transmission/reception finishes, reception data is input. (Note 1)
i initial value set bit (use bit 7 of 0362
Symbol
S3BRG
S4BRG
Symbol
S3TRR
S4TRR
16
16
set in the S I/Oi transfer rate register (i = 3, 4).
, 0366
Indeterminate
OUT
16
i initial value set bit) of SI/Oi control register (0362
144
).
Address
Address
Specifications
0363
0367
0360
0364
Indeterminate
16
16
16
16
16
16
, 0366
, 0366
16
16
, 0364
, 0048
16
16
Indeterminate
Indeterminate
Indeterminate
Indeterminate
16
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
16
When reset
When reset
) = 1.
= 0):Input from the CLKi terminal (Note 2)
, 0366
, 0366
transmission.
16
16
, 0366
16
Values that can be set
), enter the “H” level to the CLKi
) = 0.
16
16
00
)= 1.
16
= “1”): f1/2(ni+1),
16
)
to FF
Mitsubishi microcomputers
IN3
16
is not connected to
M16C / 62T Group
R
R
W
W
16
,