M306V0ME Mitsubishi, M306V0ME Datasheet

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M306V0ME

Manufacturer Part Number
M306V0ME
Description
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
Manufacturer
Mitsubishi
Datasheet
Rev. 1.1
1. DESCRIPTION
1.1 Features
1.2 Applications
The M306V0ME-XXXFP and M306V0EEFP are single-chip microcomputers using the high-performance
silicon gate CMOS process using a M16C/60 Series CPU core and are packaged in a 100-pin plastic
molded QFP. These single-chip microcomputers operate using sophisticated instructions featuring a high
level of instruction efficiency. With 1M bytes of address space, they are capable of executing instructions at
high speed. They also feature a built-in OSD display function and data slicer, making them ideal for control-
ling TV with a closed caption decoder.
The features of the M306V0EEFP are similar to those of the M306V0ME-XXXFP except that this chip has
a built-in PROM which can be written electrically.
• Memory size ........................................ <ROM>192K bytes
• Shortest instruction execution time ...... 100 ns (f(X
• Power sourse voltage .......................... 4.5 V to 5.5V
• Power consumption ............................. 250 mW
• Interrupts .............................................. 20 internal and 3 external interrupt sources, 4 software
• Multifunction 16-bit timer ...................... 2 output timers + 3 input timers + 3 timers
• Serial I/O .............................................. 2 unit
• DMAC .................................................. 2 channels (trigger: 21 sources)
• A-D converter ....................................... 8 bits
• D-A converter ....................................... 8 bits
• Data slicer ............................................ 1 circuit
• H
• OSD function ....................................... 1 circuit
• Watchdog timer .................................... 1 circuit
• Programmable I/O ............................... 78 lines
• Memory expansion .............................. Available
• Chip select output ................................ 4 lines
• Clock generating circuit ....................... 3 built-in clock generation circuits
TV with a closed caption decoder
SYNC
counter ..................................... 1 circuit (2 systems)
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
<RAM> 5K bytes
<OSD ROM> 44K bytes
<OSD RAM> 1.7K bytes
interrupt sources; 7 levels
UART/clock synchronous: 1
UART/clock synchronous/simple I
6 channels
2 channels
IN
)=10 MHz)
M306V0ME-XXXFP
and ON-SCREEN DISPLAY CONTROLLER
MITSUBISHI MICROCOMPUTERS
M306V0EEFP
2
C-BUS interface (2 systems): 1

Related parts for M306V0ME

M306V0ME Summary of contents

Page 1

... They also feature a built-in OSD display function and data slicer, making them ideal for control- ling TV with a closed caption decoder. The features of the M306V0EEFP are similar to those of the M306V0ME-XXXFP except that this chip has a built-in PROM which can be written electrically. ...

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... SPRITE OSD Function ......... 201 2.16.14 Window Function .................. 204 2.16.15 Blank Function ...................... 205 2.16.16 Raster Coloring Function ...... 208 2.16.17 Scan Mode ............................ 210 2 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 2.16. Signal Output Control ..... 210 2.16.19 OSD Reserved Register ....... 210 2.17 Programmable I/O Ports .................... 212 3. USAGE PRECAUTION .............................. 225 3.1 Timer A (timer mode) ........................... 225 3 ...

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... Figure 1.3.1 Pin configuration (top view) Rev. 1.0 and ON-SCREEN DISPLAY CONTROLLER MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP ...

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... MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP – – ...

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... Clock generating circuit Power source voltage Power consumption I/O I/O withstand voltage characteristics Output current Memory expansion Operating ambient temperature Device configuration Package Rev. 1.0 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP and ON-SCREEN DISPLAY CONTROLLER Performance 91 instructions 100 ns(f(X )=10 MHz) IN 192K bytes 5K bytes 44K bytes 1.7K bytes 8 bits 8, 5 bits ...

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... Memory type Mask ROM version E : One Time PROM version or EPROM version Shows RAM capacity, pin count, etc (The value itself has no specific meaning) M16C/6V Group M16C Family M306V0ME-XXXFP M306V0EEFP Remarks Mask ROM version One Time PROM version EPROM version 100P6S-A 100D0 ...

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... MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ...

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... “ ” MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ...

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... FFFDB 16 16 and 02BFF (in memory expansion and microprocessor modes and CFFFF (in memory expansion mode MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER to FFFFF 16 to FFFFF . The starting ad addition to storing data, the the starting addresses of subroutines to 16 ...

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... Notes 1: During memory expansion and microprocessor modes, cannot be used. 2: During memory expansion mode, cannot be used. Figure 2.1.1 Memory map 10 SFR area FFE00 16 FFFDC FFFFF 16 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Special page vector table Undefined instruction 16 Overflow BRK instruction Address match Single step ...

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... DMA1 control register (DM1CON) 003C 16 003D 16 003E 16 003F 16 Figure 2.1.2 Location of peripheral unit control registers (1) Rev. 1.0 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 0040 16 0041 16 0042 16 0043 16 0044 OSD1 interrupt control register (OSD1IC) 16 0045 Interrupt control reserved register 0 (RE0IC) ...

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... Figure 2.1.3 Location of peripheral unit control registers (2) 12 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ...

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... UART2 transmit/receive control register 1 (U2C1) 16 037E 16 UART2 receive buffer register (U2RB) 037F 16 Figure 2.1.4 Location of peripheral unit control registers (3) Rev. 1.0 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 0380 16 Count start flag (TABSR) 0381 16 Clock prescaler reset flag (CPSRF) 0382 16 One-shot start flag (ONSF) ...

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... Port P10 direction register (PD10) 03F6 16 03F7 16 03F8 16 03F9 16 03FA 16 03FB 16 Pull-up control register 0 (PUR0) 03FC 16 Pull-up control register 1 (PUR1) 03FD 16 Pull-up control register 2 (PUR2) 03FE 16 Port control register (PCR) 03FF 16 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Rev. 1.0 ...

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... INTB H b15 b0 USP b15 b0 ISP Address registers b15 b0 SB b15 b0 Frame base FLG registers IPL U MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER b0 Program counter b0 Interrupt table L register b0 User stack pointer b0 Interrupt stack pointer b0 Static base register b0 Flag register ...

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... This flag is set to “1” when an arithmetic operation resulted in a negative value; otherwise, cleared to “0”. • Bit 4: Register bank select flag (B flag) This flag chooses a register bank. Register bank 0 is selected when this flag is “0” ; register bank 1 is selected when this flag is “1”. 16 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Rev. 1.0 ...

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... If a requested interrupt has priority greater than the processor interrupt priority level (IPL), the interrupt is enabled. • Bit 15: Reserved area The and O flags are changed when instructions are executed. See the software manual for details. b15 IPL Figure 2.2.2 Flag register (FLG) Rev. 1.0 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP and ON-SCREEN DISPLAY CONTROLLER b0 Flag register (FLG ...

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... Writing “1” to bit 3 of the processor mode register 0 (address 0004 microcomputer. A software reset has almost the same effect as a hardware reset. The contents of internal RAM are preserved RESET MHz and MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 4.0V 0.8V ) applies a (software) reset to the 16 Rev. 1.0 ...

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... BYTE = “L” Address RD WR CS0 Single chip mode Address Figure 2.3.2 Reset sequence Rev. 1.0 BCLK 24cycles FFFFC FFFFD 16 FFFFC FFFFE 16 FFFFC Content of reset vector 16 FFFFE 16 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Content of reset vector FFFFE 16 16 Content of reset vector 16 19 ...

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... RD output (“H” level is output) BCLK output HLDA output (The output value depends on the input to the HOLD pin) HOLD input (floating) ALE output (“L” level is output) RDY input (floating) Input port (floating) MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER CNV = BYTE = ...

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... MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ( · · · ...

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... Nothing is mapped to this bit ? : Undefined level is applied to the CNV pin reset MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER (03D6 )··· (03D7 )··· (03DC )··· 00 ...

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... Figure 2.4.3 shows the memory maps applicable for each of the modes. Rev. 1.0 pin and the processor mode bits (bits 1 and 0 at address SS ”. 2 pin, changing the processor mode bits selects the mode. Therefore, SS ” to the processor mode is selected bits. 2 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 23 ...

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... MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ...

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... “ 0 ” MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER “ ...

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... External area OSD ROM Internal reserved area Internal ROM area External area : Accessing this area allows you to access a device connected external to the microcomputer. M306V0ME-XXXFP M306V0EEFP SFR area OSD RAM Internal reserved area Internal RAM area External area OSD ROM External area ...

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... BYTE pin Bits 4 and 5 of processor mode register 0 can be used as programmable I/O ports. When bit 6 of processor mode 3 are multiplexed with MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ) are used to change the 16 Switching factor are multiplexed with ...

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... MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER “ ” “ ” ...

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... MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER to D function 0 7 function as the data bus Bits the chip select control 7 Microprocessor mode (384K), B0000 to FFFFF (320K) 16 ...

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... Read data from both even and odd addresses L Not used Write 1 byte of data H Not used Read 1 byte of data MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER When reset 01 16 Function Chip select output disabled (Normal port pin Chip select output enabled ...

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... When multiplexed bus for the entire space is selected, these are I/O ports. Figure 2.4.5 ALE signal and address/data bus Rev. 1.0 When BYTE pin = “L” ALE A 0 Data (Note MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Address Address Data (Note 1) Address 31 ...

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... The RDY signal is invalid when setting 16 On _____ Maintain status when RDY signal received On tsu(RDY - BCLK) Accept timing of RDY signal tsu(RDY - BCLK) Accept timing of RDY signal ________ MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP ________ ________ ), but the RDY pin should be 16 Status ________ Rev. 1.0 ...

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... Address output Floating Output data RD, WR, WRL, WRH output BHE output Output "H" Output "L" “1”. 16 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER __________ Status Internal ROM/RAM accessed Maintain status before accessed address of external area Floating Undefined Output " ...

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... Wait bit control register Invalid Invalid 0 Invalid 1 Invalid (Note (Note) MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ). 16 Bus cycle 2 BCLK cycles 1 BCLK cycle 2 BCLK cycles 1 BCLK cycle 2 BCLK cycles 2 BCLK cycles 3 BCLK cycles 3 BCLK cycles Rev. 1.0 ...

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... Data bus Chip select Figure 2.4.8 Typical bus timings using software wait Rev. 1.0 Bus cycle Output Address Address Bus cycle Output Address Bus cycle Address Data output Address Address MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Input Input Address Address Input 35 ...

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... Available function Oscillator status Oscillating immediately after reset Other Externally derived clock can be input 36 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP and ON-SCREEN DISPLAY CONTROLLER Sub-clock oscillation circuit OSD oscillation circuit • CPU’s operating clock • OSD’s operating clock source source • Timer A/B’s count clock source • ...

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... Microcomputer OSC1 OSC2 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ...

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... CM04 f C Sub clock OUT R Main clock CM02 CM05 1/2 1/2 a CM06=0 CM17,CM16=01 CM06=0 CM17,CM16= MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER C32 SIO2 SIO2 SIO2 CM07 Divider BCLK ...

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... IN OUT -X drive capacity select bit (bit 3 at address CIN COUT ) changes to “1” when shifting from high 32, 1SIO2 8SIO2 32SIO2, AD MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP ). 16 ), the sub-clock can However, be sure the ...

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... H , ” MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ...

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... Retains status before stop mode “H” “H” “H” Retains status before stop mode Retains status before stop mode Valid only in single-chip mode Valid only in single-chip mode MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ) enable stops all oscillation and the microcom- 16 ...

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... Retains status before wait mode Valid only in single-chip mode selected Valid only in single-chip mode MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Single-chip mode Retains status before wait mode Does not stop Does not stop when the WAIT peripheral function clock stop bit is “ ...

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... Invalid 0 0 Invalid Invalid 0 1 Invalid 1 1 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP it needs that the oscillation of the CIN Operating mode of BCLK Division by 2 mode Division by 4 mode Division by 8 mode Division by 16 mode No-division mode Low-speed mode Low power dissipation mode 43 ...

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... All oscillators stop. The CPU and all built-in peripheral functions stop. This mode, among the three modes listed here, is the most effective in decreasing power consumption. Figure 2.5.7 is the state transition diagram of the above modes. 44 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Rev. 1.0 ...

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... “ 0 ” “ 1 ” “ 1 ” MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER “ ...

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... Note: Writing a value to an address after “1” is written to this bit returns the bit to “0.” Other bits do not automatically return to “0” and they must therefore be reset by the program. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ), system clock control reg- ...

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... Watchdog timer Single step Address matched Peripheral I/O (Note) An interrupt which can be enabled (disabled) by the interrupt enable flag (I flag) or whose interrupt priority can be changed by priority level. (I flag) or whose interrupt priority cannot be changed by priority level. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 47 ...

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... When returning from the interrupt routine, the U flag is returned to the state it was before the acceptance of interrupt re- quest. So far as software numbers 32 through 63 are concerned, the stack pointer does not make a shift. 48 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Rev. 1.0 ...

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... These are interrupts that timer B generates. ________ ________ • INT0 interrupt and INT1 interrupt ______ An INT interrupt occurs if either a rising edge or a falling edge or a both edge is input to the INT pin. Rev. 1.0 ____________ edge is input. SYNC MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ______ 49 ...

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... SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER • OSD1 interrupt and OSD2 interrupt These are interrupts that OSD display is completed. • Data slicer interrupt This is an interrupt that data slicer circuit requests. 50 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Rev. 1.0 ...

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... There is an address-matching interrupt enable bit FFFEF Do not use FFFF3 FFFF7 Do not use FFFEB Do not use FFFFF 16 16 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER LSB High address Remarks , program execution starts from 16 51 ...

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... MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ...

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... The interrupt request bit and the interrupt priority level selection bit are located in the interrupt control register of each interrupt. Also, the interrupt enable flag (I flag) and the IPL are located in the flag register (FLG). Figure 2.7.3 shows the interrupt control registers. Rev. 1.0 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 53 ...

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... Must always be set to “0” rewrite the interrupt control register point that does not generate the interrupt register for that register. For details, see the precautions for interrupts. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER When reset ...

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... Interrupt levels 4 and above are enabled Interrupt levels 5 and above are enabled Interrupt levels 6 and above are enabled Interrupt levels 7 and above are enabled High All maskable interrupts are disabled M306V0ME-XXXFP M306V0EEFP Enabled interrupt priority levels 55 ...

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... Instructions : AND, OR, BCLR, BSET 56 and ON-SCREEN DISPLAY CONTROLLER ; Disable interrupts. ; Four NOP instructions are required when using HOLD function. ; Enable interrupts. ; Disable interrupts. ; Dummy read. ; Enable interrupts. ; Push Flag register onto stack ; Disable interrupts. ; Enable interrupts. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP Rev. 1.0 ...

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... Figure 2.7.4 shows the interrupt response time. Interrupt request generated Instruction (a) Figure 2.7.4 Interrupt response time Rev. 1.0 Interrupt request acknowledged Interrupt sequence (b) Interrupt response time MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Time Instruction in interrupt routine 57 ...

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... Odd 20 cycles (Note 1) ________ Indeterminate SP-2 SP-2 Indeterminate contents Indeterminate MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 8-Bit bus, without wait 20 cycles (Note 1) 20 cycles (Note 1) 20 cycles (Note 1) 20 cycles (Note SP-4 vec vec+2 ...

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... Flag register m – 1 [SP] Stack pointer m value before interrupt occurs Stack status after interrupt request is acknowledged MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Stack area LSB [SP] New stack Program counter ( pointer value Program counter ( ...

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... Program ) counter ( Finished saving registers in two operations. Stack area Sequence in which order registers are saved ) ( (4) Saved simultaneously, all 8 bits ) L (1) Program (2) counter ( Finished saving registers in four operations. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Rev. 1.0 ...

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... Interrupt priority level resolution circuit When two or more interrupts are generated simultaneously, this circuit selects the interrupt with the highest priority level. Figure 2.7.9 shows the circuit that judges the interrupt priority level. Rev. 1.0 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 61 ...

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... Figure 2.7.9 Maskable interrupts priorities (peripheral I/O interrupts) 62 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP and ON-SCREEN DISPLAY CONTROLLER ...

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... MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ...

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... RMAD0 RMAD1 Function Address setting register for address match interrupt Nothing is assigned attempt to write to these bits, write “0”. The value, if read, turns out to be indeterminated. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 2 Function Interrupt disabled 1 : Interrupt enabled ...

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... INT pins is changed, the interrupt request bit is sometimes set MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER will then be set to “0” Accepting an interrupt 16 ________ 0 65 ...

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... Set the interrupt enable flag to “1” (Enable interrupt) ______ ; Disable interrupts. ; Four NOP instructions are required when using HOLD function. ; Enable interrupts. ; Disable interrupts. ; Dummy read. ; Enable interrupts. ; Push Flag register onto stack ; Disable interrupts. ; Enable interrupts. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP Rev. 1.0 ...

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... Thus the watchdog timer’s period can be calcu- 16 pre-scaler dividing ratio (16 or 128) BCLK pre-scaler dividing ratio (2) watchdog timer count (32768) BCLK ). 16 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER is selected for the IN ) selects the prescaler division ratio (by watchdog timer count (32768) ) and when 16 67 ...

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... Indeterminate 16 Function The watchdog timer is initialized and starts counting after a write instruction to this register. The watchdog timer value is always initialized to “7FFF regardless of whatever value is written. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Watchdog timer Watchdog timer interrupt request Set to “7FFF ” ...

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... DMA1 source pointer SAR1 (20) , 0028 ) (addresses 0032 16 16 DMA1 destination pointer DAR1 (20) DMA1 forward address pointer (20) (Note) , 0038 ) 16 16 DMA latch high-order bits Note: Pointer is incremented by a DMA request. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP to 0020 ) 16 16 (addresses 0026 to 0024 ) 0030 ) 16 16 ...

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... DMA enable bit is “0”. Can be read at any time. However, when the DMA enable bit is “1”, reading the register set up as the forward register is the same as reading the value of the forward address pointer. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER to 003F ] cannot be accessed) ...

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... Expanded cause If software trigger is selected, a Software DMA DSR DMA request is generated by request bit setting this bit to “1” (When read, the value of this bit is always “0”) MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER When reset 00 16 Function R W pin ...

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... MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER When reset 00 16 ...

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... In an attempt to write to these bits, write “0”. The value, if read, turns out to be “0.” b0 Symbol TCR0 TCR1 Function • Transfer counter Set a value one less than the transfer count MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP Address When reset 0022 to 0020 Indeterminate 16 16 ...

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... For example (2) in Figure 47, if data is being transferred in 16-bit units on an 8-bit bus, two bus cycles are required for both the source read cycle and the destination write cycle. 74 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Rev. 1.0 ...

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... Source Destination cycle Dummy Source Destination cycle Source Source + 1 Destination Source Source + 1 Destination MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER CPU use CPU use CPU use CPU use CPU use CPU use Dummy CPU use cycle Dummy CPU use cycle ...

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... Even 1 Odd 1 Even — Odd — Even 1 Odd 2 Even — Odd — External memory Separate bus Separate bus No wait 2 1 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP j + No. of write cycles k Memory expansion mode Microprocessor mode cycles cycles — — ...

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... Selecting the INTi pins as external factors using the DMA request factor selection bit causes input from these pins to become the DMA transfer request signals. The timing for the DMA request bit to turn to 1 when an external factor is selected synchronizes with Rev. 1.0 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER _______ 77 ...

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... DMA transmission request signals due to external factors concurrently occur. BCLK DMA0 DMA1 CPU INT0 DMA0 request bit INT1 DMA1 request bit Figure 2.9.9 An example of DMA transfer effected by external factors 78 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER _______ Obtainm ent of the bus right Rev. 1.0 ...

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... Timer mode • One-shot mode • PWM mode Timer A3 • Event counter mode • Timer mode • One-shot mode Timer A4 • Event counter mode MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Clock prescaler f 1/32 C32 Reset Timer A0 interrupt Timer A1 interrupt ...

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... • MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ...

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... MR3 TCK0 Count source select bit (Function varies with each operation mode) TCK1 Note: Only timers 2 and 3 have PWM mode. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ” ...

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... TA3S Timer A3 count start flag TA4S Timer A4 count start flag TB0S Timer B0 count start flag TB1S Timer B1 count start flag TB2S Timer B2 count start flag MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER When reset ,0386 Indeterminate 16 16 ,0388 Indeterminate 16 16 ...

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... TA0TGL Timer A0 event/trigger not set select bit TB2 overflow is selected TA0TGH TA4 overflow is selected TA1 overflow is selected MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ...

Page 84

... Bit symbol Bit name Nothing is assigned attempt to write to these bits, write “0.” The value, if read, turns out to be indeterminate. CPSR Clock prescaler reset flag MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 00 16 Function not set ...

Page 85

... TCK0 Count source select bit TCK1 are invalid This bit of TAiMR ( must always be set to “0.” MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER pin’s polarity is reversed OUT 16 Function R W /TA3 pin is a normal port pin) ...

Page 86

... Pulse output function Each time the timer overflows or underflows, the TAi Note: This does not apply when the free-run function is selected. 86 and ON-SCREEN DISPLAY CONTROLLER Specification - for up count Set value MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP pin’s polarity is reversed OUT Rev. 1.0 ...

Page 87

... “ ” “ ” MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ...

Page 88

... TCK1 C32 Notes 1 : The settings of the corresponding port register and port direction register are invalid This bit of TAiMR ( must always be set to “0.” MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Function /TA3 pin is a normal port pin) ...

Page 89

... PWM mode 0: Functions as a 16-bit pulse width modulator MR3 1: Functions as an 8-bit pulse width modulator select bit b7 b6 TCK0 Count source select bit TCK1 C32 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Function 89 ...

Page 90

... MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 8 Rev. 1.0 ...

Page 91

... MR1 MR2 MR3 TCK0 Count source select bit (Function varies with each operation mode) TCK1 2: Timer B1, timer B2. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Data bus high-order bits Data bus low-order bits High-order 8 bits Low-order 8 bits Reload register (16) Counter (16) ...

Page 92

... Bit symbol Bit name Nothing is assigned attempt to write to these bits, write “0.” The value, if read, turns out to be indeterminate. CPSR Clock prescaler reset flag MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Address When reset 0391 , 0390 Indeterminate 16 16 ...

Page 93

... MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ...

Page 94

... “ 0 ” . MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER R ...

Page 95

... “ 1 ” MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER R ...

Page 96

... Cleared to “0” when interrupt request is accepted, or cleared by software. Transfer Transfer Transfer (indeterminate (measured value) (measured value) value) (Note 1) (Note 1) (Note 1) Cleared to “0” when interrupt request is accepted, or cleared by software. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP Transfer (measured value) (Note 2) (Note 1) Transfer (measured value) (Note 1) (Note 2) Rev. 1.0 ...

Page 97

... “ 0 ” “ 1 ” MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ...

Page 98

... MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ...

Page 99

... C-BUS interface with some extra settings added in clock-synchro- 2 UART0 UART2 Possible (Note 1) Possible Possible (Note 1) Possible Possible (Note 1) Possible Impossible Impossible Impossible Possible Possible (Note 3) Impossible Impossible Possible N-channel open-drain CMOS output output Impossible Possible Impossible Possible MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP 16 (Note 1) (Note 2) (Note 1) (Note 4) (Note 4) 99 ...

Page 100

... CTS/RTS disabled RTS 2 CTS/RTS disabled CTS Values set to UART0 bit rate generator (BRG0 Values set to UART2 bit rate generator (BRG2) MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER TxD 0 Receive clock Transmit/ receive unit Transmit clock ...

Page 101

... UART (9 bits) type PAR UART enabled PAR Clock UART (7 bits) disabled synchronous type UART (7 bits) UART (8 bits) “0” Clock synchronous type MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER UARTi receive register UART0 receive buffer register ...

Page 102

... PAR UART UART(7 bits) synchronous disabled (7 bits) type UART (8 bits) “0” Clock synchronous type Error signal output disable Error signal output enable MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER UART2 receive register UART2 receive ...

Page 103

... When reset U0BRG 03A1 Indeterminate 16 U2BRG 0379 Indeterminate 16 Function Assuming that set value = n, BRGi divides the count source MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP R W Function R W (During UART mode) Receive data Invalid overrun error 1 : Overrun error found framing error ...

Page 104

... TxD, RxD I/O polarity reverse reverse bit 1 : Reverse Usually set to “0” 2 ” when I C mode is used. 2 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Function R W (During UART mode Transfer data 7 bits long Transfer data 8 bits long ...

Page 105

... Transmit data is output at rising edge of transfer clock and receive data is input at falling edge 0 : LSB first 1 : MSB first MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Function R W (During UART mode selected ...

Page 106

... MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ...

Page 107

... Data logic select bit reverse 1 : Reverse Must always be set to “0” enable bit MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ...

Page 108

... Must always be set to “0” select bit of transmit enable bit Transmit start condition Must always be set to “0” select bit Must always be set to “0” MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 2 Function R W (During UART mode Transmit buffer empty ( ...

Page 109

... This error occurs when the next data is ready before contents of UARTi receive buffer register are read out Rev. 1.0 and ON-SCREEN DISPLAY CONTROLLER Specification _______ _______ _______ _______ _______ 16 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP , 0378 = “0” 0378 = “1” 037D ) = “1” 037D ) = “0” 037C ) = “ ...

Page 110

... If an overrun error occurs, the UARTi receive buffer will have the next data written in. Note also that the UARTi receive interrupt request bit is not set to “1”. 110 Specification to FF that is set to the UART bit rate generator MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Rev. 1.0 ...

Page 111

... Internal/external clock select bit STPS PRY Invalid in clock synchronous serial I/O mode PRYE IOPOL TxD, RxD I/O polarity reverse bit (Note) Note: Usually set to “0”. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 00 16 Function Clock synchronous serial I/O mode ...

Page 112

... CTS/RTS disable bit (bit 4 at address 03A4 CTS/RTS function select bit (bit 2 at address 03A4 CTS/RTS disable bit (bit 4 at address 03A4 _______ _______ MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP , 16 , 0378 ) = “0” 0378 ) = “1” ...

Page 113

... Meet the following conditions are met when the CLK input before data reception = “H” • Transmit enable bit • Receive enable bit • Dummy data write to UARTi transmit buffer register MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Stopped pulsing because transfer enable bit = “0” ...

Page 114

... Note: This applies when the CLK polarity select bit = “0”. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER , 037C ) allows 16 16 Note 1: The CLK pin level when not transferring data is “H”. Note 2: The CLK pin level when not transferring data is “ ...

Page 115

... Figure 2.11.20 Serial data logic switch timing Rev. 1.0 MITSUBISHI MICROCOMPUTERS and ON-SCREEN DISPLAY CONTROLLER , bit 5 at address 037D “1”, and writing to transmit buffer register M306V0ME-XXXFP M306V0EEFP ) is set 115 ...

Page 116

... Interrupts requested when data transfer from UARTi “1”: Interrupts requested when data transmission from 16 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER , 0378 = “0” 0378 =“ ...

Page 117

... If an overrun error occurs, the UARTi receive buffer will have the next data written in. Note also that the UARTi receive interrupt request bit is not set to “1”. Rev. 1.0 Specification to FF that is set to the UARTi bit rate generator MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 117 ...

Page 118

... Internal / external clock select bit STPS Stop bit length select bit PRY Odd / even parity select bit PRYE Parity enable bit IOPOL TxD, RxD I/O polarity reverse bit (Note) MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 00 16 Function Function ...

Page 119

... CTS/RTS disable bit (bit 4 at address 03A4 CTS/RTS function select bit (bit 2 at address 03A4 CTS/RTS disable bit (bit 4 at address 03A4 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP , 16 , 0378 ) = “0” 0378 ) = “1” ...

Page 120

... frequency of BRGi count source ( frequency of BRGi count source (external clock) EXT n : value set to BRGi MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Stopped pulsing because transmit enable bit = “0” ...

Page 121

... BRG2 Start bit D 0 Sampled “L” Receive data taken in Transferred from UARTi receive register to UARTi receive buffer register Cleared to “0” when interrupt request is accepted, or cleared by software MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ...

Page 122

... Set this function to “0” (not to reverse) for usual use. 122 ) is assigned 1, data is inverted in writing to the MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Start bit P : Even parity SP : Stop bit Rev. 1.0 ...

Page 123

... Transmit start condition select bit (Bit 6 of the UART2 special mode register normal state CLK TxD Enabling transmission With "1: falling edge of RxD " selected 2 CLK TxD RxD Figure 2.11.26 Some other functions Rev. 1.0 MITSUBISHI MICROCOMPUTERS and ON-SCREEN DISPLAY CONTROLLER ST ST M306V0ME-XXXFP M306V0EEFP Start bit SP : Stop bit 123 ...

Page 124

... M306V0ME-XXXFP M306V0EEFP = “101 ” “1” and “1” respectively “0”). = “0” and “1” respectively “1”) = “1”) 16 ...

Page 125

... RxD pin when a transmission interrupt occurs that is set to the UARTi bit rate generator MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER pin by use of the parity error 2 = “1”) when a parity error is detected 16 125 ...

Page 126

... Cleared to “0” when interrupt request is accepted, or cleared by software frequency of BRGi count source (f f EXT : frequency of BRGi count source (external clock value set to BRGi and RxD are connected MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ...

Page 127

... SIM card TxD 2 RxD 2 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ) assigned “1”, you can output an “L” Start bit P : Even Parity SP : Stop bit data is inverted Even parity and RxD ...

Page 128

... Must always be set to “0” select bit of transmit enable bit Must always be set to “0” Transmit start condition select bit Must always be set to “0” MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Function R W (During UART mode) Must always be set to “0” ...

Page 129

... P7 , and P7 selected by bits 0 and 1 of the peripheral mode register MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Notes 1: Make the settings given below when I mode is in use. •Set bits the UART2 transmission-reception mode register. •Disable the RTS/CTS function. ...

Page 130

... SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER Figure 2.11.32 Functional block diagram for I 130 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP and ON-SCREEN DISPLAY CONTROLLER 2 C mode M306V0EEFP Rev. 1.0 ...

Page 131

... SCL2) to “0” in synchronization with the SCL terminal’s level going to “L.” Rev. 1.0 and ON-SCREEN DISPLAY CONTROLLER ) is used as the arbitration lost detecting flag control bit. 16 when using SCL1, P7 when using SCL2 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP when using both SCL1 1 131 ...

Page 132

... Figure 2.10.33). 2 Figure 2.11.33 I C-BUS interface port control 132 2 ) function as I C-BUS interface ports. These ports are set by bits 0 and SCL 2 I C-BUS interface unit SDA MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER SCL1/P7 1 SCL2/P7 2 SDA1/P7 0 SDA2/P6 7 Rev. 1.0 ...

Page 133

... With sample and hold function: 5 LSB cycles AD cycles AD ) exceeds 10 MHz, and make IN frequency to 250kHz min. AD frequency to 1MHz min. AD MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ) can be used to isolate the 16 ) when the A-D converter is not used. Doing . REF , f =f frequency equal to 10 MHz. Without AD 133 ...

Page 134

... CKS0=1 1/2 1/2 CKS0=0 Resistor ladder A-D control register 1 (address 03D7 A-D control register 0 (address 03D6 A-D register 0(8) A-D register 1(8) A-D register 2(8) CH2,CH1,CH0=010 CH2,CH1,CH0=011 CH2,CH1,CH0=100 CH2,CH1,CH0=101 CH2,CH1,CH0=110 CH2,CH1,CH0=111 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER CKS1=1 AD A-D conversion rate CKS1=0 selection ) ref Decoder Comparator V IN Rev. 1.0 ...

Page 135

... Frequency select bit CKS1 Vref connect bit 0 : Vref not connected VCUT 1 : Vref connected Reserved bits Most always be set to “0” indeterminate. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 2 Function selected 0 is selected 1 is selected 2 is selected ...

Page 136

... Must always be set to “0” result is indeterminate. Symbol Address 03C4 , 03C6 ADi(i 03CA , 03CC Function MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER When reset 0000???0 2 Function R W When reset , 03C8 Indeterminate 16 , 03CE Indeterminate Rev. 1.0 ...

Page 137

... End of A-D conversion • Writing “0” to A-D conversion start flag End of A-D conversion Interrupt request generation timing Input pin One of AN Read A-D register corresponding to selected pin Reading of result of A-D converter Rev. 1.0 and ON-SCREEN DISPLAY CONTROLLER Specification selected 0 5 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP 137 ...

Page 138

... Must always be set to “0” Frequency select bit1 Vref connect bit 1 : Vref connected Must always be set to “0” result is indeterminate. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 2 Function R is selected 0 is selected 1 is selected 2 is selected ...

Page 139

... Writing “1” to A-D conversion start flag Stop condition Writing “0” to A-D conversion start flag None generated Interrupt request generation timing Input pin One of AN Read A-D register corresponding to selected pin Reading of result of A-D converter Rev. 1.0 and ON-SCREEN DISPLAY CONTROLLER Specification selected 0 5 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP 139 ...

Page 140

... Most always be set to “0” Frequency select bit selected AD Vref connect bit 1 : Vref connected Most always be set to “0” result is indeterminate. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 2 Function selected 0 is selected 1 is selected 2 ...

Page 141

... Writing “0” to A-D conversion start flag End of A-D conversion Interrupt request generation timing Input pin AN Read A-D register corresponding to selected pin Reading of result of A-D converter Rev. 1.0 Specification and AN (2 pins pins MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER pins 141 ...

Page 142

... Must always be set to “0” Frequency select bit selected AD Vref connect bit 1 : Vref connected Must always be set to “0” is indeterminate. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 2 Function R W Function R and AN (2 pins ...

Page 143

... Writing “0” to A-D conversion start flag None generated Interrupt request generation timing Input pin AN Read A-D register corresponding to selected pin (at any time) Reading of result of A-D converter Rev. 1.0 Specification and AN (2 pins pins MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER pins 143 ...

Page 144

... Must always be set to “0” Frequency select bit selected AD Vref connect bit 1 : Vref connected Must always be set to “0” is indeterminate. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 2 Function R W Function R and AN (2 pins ...

Page 145

... Must always be set to “0” A-D conversion start flag 0 : A-D conversion disabled 1 : A-D conversion started selected Frequency select bit selected AD is indeterminate. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER etc Function ...

Page 146

... Must always be set to “0” Frequency select bit selected AD Vref connect bit 1 : Vref connected Must always be set to “0” is indeterminate. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Function R (1 pin) 0 and AN (2 pins selected AD W Rev ...

Page 147

... As a result achieved. Sample and hold can be selected in all modes. However, in all modes, be sure to specify before starting A-D conversion whether sample and hold used. Rev. 1.0 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ) to “1”. When 16 ...

Page 148

... REF Performance R-2R method 8 bits 2 channels Data bus low-order bits D-A register0 (8) (Address 03D8 D-A0 output enable bit R-2R resistor ladder D-A register1 (8) (Address 03DA D-A1 output enable bit R-2R resistor ladder MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ) Rev. 1.0 ...

Page 149

... In an attempt to write to these bits, write “0.” The value, if read, turns out to be “0.” Symbol Address DAi (i = 0,1) 03D8 03DA Function Output value of D-A conversion MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER When reset 00 16 Function R W When reset Indeterminate LSB ...

Page 150

... Start bit detecting circuit Data clock generating circuit 16-bit shift register 16 , 0262 0264 ) 16 16 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ) to “0.” These settings can 16 ) according to 16 Data slicer control register 2 (address 0261 ) 16 Data slicer control register 1 (address 0260 ) ...

Page 151

... CC Open Open more through pin 200pF Open more MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER HLF 2 V HOLD 100 ) are “1,” terminate the pins as shown ...

Page 152

... Must always be set to “0” Read-only Test bit Definition of fields 1 (F1) and 2 (F2) F1: H sep V sep F2: H sep V sep MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 00 16 Function Stopped 1: Operating Video signal 1: H signal SYNC Must always be set to “0” ...

Page 153

... A V signal is generated at a rising of the timing signal sep immediately after the “L” level width of the composite sync signal exceeds a certain time. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER pin. The low- IN pin to which composite video IN pin with a resistor of ...

Page 154

... In this period, various timing signals, Hsep signals and V signals become unstable. For this reason, take stabilization time into consideration when sep programming. Composite sync signal Figure 2.14.7 Determination of v-pulse waveform 154 ) to “1.” Bit 5 of DSC2 A B MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Rev. 1.0 ...

Page 155

... Vertical blanking interval Count value to be set in the caption position register (“0F Clock run-in Start bit MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER sep 1 appropriate line is set by the caption position register Line 21 (when setting line 19) ” ...

Page 156

... Field specified by bit 1 of DSC1 • Line 21 (total 1 line) • Field specified by bit 1 of DSC1 • Line 21 and a line specified by bits CPS (total 2 lines) (See note 2) MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER When reset 00?00000 2 Function R W Rev ...

Page 157

... CRD 0269 Bit name Bit symbol Test bits CRD3 Clock run-in detection bits CRD4 CRD5 CRD6 CRD7 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER When reset Function Read-only Number of reference clocks to be counted in one clock run-in pulse period. ...

Page 158

... DPS4 Nothing is assigned attempt to write to these bits, write “0.” The read turns out to be “0.” , 0262 ) and caption data register 2 (addresses 16 16 sep MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ). When reset XXX00001 Function . Read out data registers 1 and 2 after ...

Page 159

... DR2 0267 Bit name Mest always be set to “0” MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Contents of 16-bit Shift Register Caption Data Caption Data Register 1 Register 2 16-bit data of a line specified by bits CPS Invalid by bits CPS ...

Page 160

... HIGH width (LOW width) needs 3 main clock cycles or more of system clock. 1024 s 2048 s HCC3, HCC4 4096 s 8192 s HCC1 Polarity switch HCC0 side when reset. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER , HC1/ ,” “ count source 16 counter register. ...

Page 161

... MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 16 lines) and the SPRITE display, and ...

Page 162

... OSD circuit. Figure 2.16.3 shows the OSD control register 1. Figure 2.16.4 shows the block control register i. OSDS mode 16 dots CC mode 16 dots : Displayed only in cc mode. Figure 2.16.1 Configuration of OSD character display area 162 MITSUBISHI MICROCOMPUTERS and ON-SCREEN DISPLAY CONTROLLER Blank area Underline area Blank area M306V0ME-XXXFP M306V0EEFP OSDL mode 24 dots CDOSD mode 16 dots Rev. 1.0 ...

Page 163

... SPRITE OSD control register OSD reserved register i OSD control register 4 16 lines 254 characters 254 characters R 3 planes Notes character-mode, 19 bits 2: In OSDL disable mode, 16 dots MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER (address 0202 ) 16 (address 0203 ) 16 (address 0204 ) ...

Page 164

... Layer 2’s color has priority not set. remains unchanged until a rising (falling) of the next Shadow border is output at right and bottom side of the font OUT2 is always ORed, regardless of values of these bits. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER When reset 00 16 ...

Page 165

... SYNC 3: This character size is available only in Layer 2. At this time, set layer 1’s pre-divide ratio = 2, layer 1’s horizontal dot size = 1Tc OSDL mode, 1.5Tc size cannot be used. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER When reset Indeterminate 16 Function ...

Page 166

... OUT2 in layer 1/layer 2 is output. Layer 1/layer 2 Block 1 Block 2 SPRITE Block layer 1/layer 2 Block 8 OUT2 of layer 1/layer 2 Layer 1 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Block in Layer 2 OSD, CDOSD mode Same as layer 1 (See note) 1 Pre-divide ratio = 1/2H 1T 1/2H, 1.5T C ...

Page 167

... Vertical blank function Window/blank OC26 1: Vertical window function selection bit 2 (vertical) OSD interrupt 0: At completion of layer 1 block display OC27 request selection bit 1: At completion of layer 2 block display MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP CH5 HELLO When reset Function Layer 1 Layer 2 CDOSD ...

Page 168

... OSD oscillation cycle). OSC OSC cycle). SYNC 3H during display period ( ) of another block VP1 Block 1 VP2 Block 2 VP3 Block 3 HP VP1 = VP2 Block 1 (Block 2 is not displayed) HP VP1 Block 1 VP2 Block 2 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Rev. 1.0 ...

Page 169

... SYNC of V control signal in microcomputer to avoid jitter. SYNC 3 : The pulse width of H needs 18 BCLK cycles or more SYNC (BCLK = 10 MHz). MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER SYNC signal. So SYNC signal needs SYNC and V signals can SYNC ...

Page 170

... Bit symbol Bit name Horizontal display start position = 4T HP_7 to HP_0 Horizontal display start (n: setting value, T position control bits Note : The setting value synchronizes with the V . SYNC MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ( cycle SYNC to 023F ). The 16 ...

Page 171

... C Block 3 (Pre-divide ratio = 3) 1.5T C Block 4 (Pre-divide ratio = 2, character size = 1.5Tc Value of horizontal position register (decimal notation OSD clock cycle divided in pre-divide circuit Tosc = OSD oscillation cycle Tdef = 50Tosc MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER only when the C 171 ...

Page 172

... C Synchronous Cycle 2 circuit Cycle 3 Pre-divide circuit 1 dot 1/ normal scan mode MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP Horizontal dot size control circuit Vertical dot size control circuit OSD control circuit 3T C Scanning line of F1 (F2) Scanning line of F2 (F1) 3H Rev. 1.0 ...

Page 173

... Data slicer clock Data slicer circuit “0” “10” OSC1 clock “1” “11” CS1 , MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER When reset 00 16 Function Data slicer clock 1: OSC1 clock Stopped not set. ...

Page 174

... Display dot line selection bit “ ” at odd field (See note “ ” at even field “ ” at odd field Field determination 0 : Even field PC7 flag 1 : Odd field Note: Refer to Figure 2.16.18. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER SYNC Function Rev. 1.0 ...

Page 175

... I/O polarity control register can be read as the field determination flag : “1” is read at odd field, “0” is read at even field. OSD ROM font configuration diagram control signal (negative-polarity input) in SYNC MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Display dot line Display dot line selection bit 0 Dot line 1 0 (T2 > ...

Page 176

... OSDL disable mode selection bit Number of horizontal characters for each block display characters (32-character mode) selection bit characters for each block (42-character mode) MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER to AFFFF ) used to store used to specify the kinds of display Rev ...

Page 177

... MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER AD6 AD5 AD4 AD3 AD2 AD1 AD0 Area Character code (C7 to C0) 0 bit Area Character code (C7 to C0) 0 bit Character 0 code ...

Page 178

... MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 Area 0 bit Area 0 bit Area 0 Character code (C6 to C0) bit ” to corresponding addresses.) 16 Area 0 ...

Page 179

... In OSDL disable mode, character codes “280 in OSDS mode (no border setting this make output of font data indeterminate, do not use. MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER OSDL disable mode (Bit 0 of OSD control register 4 = “1”) CC OSDS OSDL ...

Page 180

... Color palette 2 (10) is selected Color palette 3 (11) is selected Color palette 4 (12) is selected MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER AD6 AD5 AD4 AD3 AD2 AD1 AD0 Area 1 CD code (C5 to C0) bit Plane 0 (Color palette selection bit ...

Page 181

... MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ) 16 to 0EFF , and is divided into a display 16 . The structure of the 16 1/2H or 1.5Tc 1H 1/2H and 1T 1H • ...

Page 182

... M306V0ME-XXXFP M306V0EEFP Color Code 2 Specification 0480 16 0482 04BC 16 16 04BE 16 16 04C0 16 04C2 04FC 16 16 04FE 16 16 0580 16 0582 16 16 ...

Page 183

... M306V0ME-XXXFP M306V0EEFP Color Code 2 Specification 0980 16 0982 16 : 09BC 16 09BE 16 09C0 16 09C2 16 : 09FC 16 09FE 16 0A80 16 0A82 16 : 0ABC 16 0ABE 16 0AC0 16 0AC2 16 ...

Page 184

... M306V0ME-XXXFP M306V0EEFP Color Code 2 Specification 0C80 16 16 0C82 0C8C 16 16 0C8E 16 16 0E80 16 0E82 16 16 0C90 16 0C92 0C9C 16 16 0C9E ...

Page 185

... M306V0ME-XXXFP M306V0EEFP Color Code 2 Specification 0CF0 16 0CF2 16 : 0CFC 16 0CFE 16 0EB8 16 0EBA 16 0D80 16 0D82 16 : 0D8C 16 0D8E 16 0EC0 16 0EC2 16 0D90 16 0D92 ...

Page 186

... M306V0ME-XXXFP M306V0EEFP Color Code 2 Specification 0DE0 16 0DE2 16 : 0DEC 16 0DEE 16 0EF0 16 0EF2 16 0DF0 16 0DF2 16 : 0DFC 16 0DFE 16 0EF8 16 0EFA 16 Rev. 1.0 ...

Page 187

... Color palette Specify color palette selection bit 2 for background (See note 3) Color palette selection bit 3 Specify character Character code code in OSD ROM (High-order 1 bit 1.5T C MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP Character code CDOSD mode Bit name Function Specify character code ...

Page 188

... MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ) 16 Plane 0F00 0F01 16 16 0F02 0F03 16 16 0F24 0F25 16 16 0F26 0F27 16 16 Plane 2 ...

Page 189

... Accordingly, the character background color and the color signal for these two sections cannot be mixed. Rev. 1.0 ). Color palettes are set in dot units according to the CD font data (the OSD ). Color palettes are set by bits RC20 and RC21 of the 16 MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 189 ...

Page 190

... CC mode (character) SPRITE display CC mode CDOSD mode (character) (background) (See note 2) Select one palette in screen units. (See note 1) MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER OSD mode (character, background) Select either Any palette palette in can be screen units. selected. (See note 1) ) ...

Page 191

... When setting black and blue to color palettes 1 and 2, respectively (only in CDOSD mode). Color palette 1 (Transparent) Color palette 0 (Transparent) Color palette 2 (Blue) When layer 1 has priority. Color palette 8 (Black) MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 0010 Transparent Black Blue Black ...

Page 192

... Output output control bit Nothing is assigned attempt to write to this bit, write “0.” The value, if read, turns out to be indeterminate. Note: When selecting digital output, the output is V MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER Function When reset ...

Page 193

... Output register i waveform Character Background output Output (See note MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 193 ...

Page 194

... Figure 2.16.33). 194 count. SYNC cycle 24 400 ms (at flash ON) cycle 8 133 ms (at flash OFF) MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER 5 steps is displayed ; 10 steps is displayed Rev. 1.0 ...

Page 195

... MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ...

Page 196

... Notes 1 : The dotted line is the boundary of character color When bit 4 of OSD control register 1 is “0.” Figure 2.16.33 Example of italic display 196 MITSUBISHI MICROCOMPUTERS and ON-SCREEN DISPLAY CONTROLLER (Refer to “12.16.10 Notes 6, 7” M306V0ME-XXXFP M306V0EEFP 32nd chracter 0 1 Rev. 1.0 ...

Page 197

... C Shadow bordered y x Scan mode Normal scan mode Vertical dot size of character font 1/2H 1H, 2H (OSD clock cycle divided in pre-divide circuit) C 1.5T when selecting 1.5T C 1/2H 1H MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP , the C Bi-scan mode 1/2H, 1H, 2H, 3H for character size 197 ...

Page 198

... SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER Character font area 1 dot width of border Figure 2.16.36 Border area Character boundary Figure 2.16.37 Border priority 198 OSDS mode 16 dots 1 dot width of border Character boundary Character boundary B A MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER B Rev. 1.0 ...

Page 199

... OFF display area display area ” as the character A, “006 solid space output MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER ,” the set font is output •Solid space area •Character font area •Character background area • ...

Page 200

... Block 1 No Block 2 “OSD1 interrupt request” “OSD1 interrupt request” Block 3 Window MITSUBISHI MICROCOMPUTERS M306V0ME-XXXFP M306V0EEFP and ON-SCREEN DISPLAY CONTROLLER “OSD1 interrupt request” “OSD1 interrupt request” No “OSD1 interrupt request” No “OSD1 interrupt request” “OSD1 interrupt request” ...

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