WS57C49C STMicroelectronics, WS57C49C Datasheet

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WS57C49C

Manufacturer Part Number
WS57C49C
Description
HIGH SPEED 8K x 8 CMOS PROM/RPROM
Manufacturer
STMicroelectronics
Datasheet

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BLOCK DIAGRAM
The WS57C49C is a High Performance 64K UV Erasable Electrically Re-Programmable Read Only Memory
(RPROM). It is manufactured in an advanced CMOS technology which enables it to operate at Bipolar PROM
speeds while consuming only 25% of the power required by its Bipolar counterparts. A further advantage of the
WS57C49C over Bipolar PROM devices is the fact that it utilizes a proven EPROM technology. This enables the
entire memory array to be tested for switching characteristics and functionality after assembly. Unlike devices which
cannot be erased, every WS57C49C in a windowed package is 100% tested with worst case test patterns both
before and after assembly.
The WS57C49C is configured in the standard Bipolar PROM pinout which provides an easy upgrade path for
systems which are currently using Bipolar PROMs, or its predecessor, the WS57C49B.
PRODUCT SELECTION GUIDE
— t
— t
Ultra-Fast Access Time
Fast Programming
Low Power Consumption
PARAMETER
Address Access Time (Max)
CS to Output Valid Time (Max)
ACC
CS
A5 - A12
ROW
ADDRESSES
A0 - A4
COLUMN
ADDRESSES
CS1/ V
= 12 ns
= 25 ns
Return to Main Menu
PP
5
8
HIGH SPEED 8K x 8 CMOS PROM/RPROM
DECODER
ROW
EPROM ARRAY
AMPLIFIERS
65,536 BITS
DECODER
COLUMN
OUTPUTS
SENSE
8
57C49C-25
25 ns
12 ns
GENERAL DESCRIPTION
KEY FEATURES
57C49C-35
PIN CONFIGURATION
35 ns
20 ns
NC
O
A
A
A
A
A
4
3
2
1
0
0
Pin Compatible with Bipolar PROMs
— Up to 200 mA
ESD Protection Exceeds 2000 V
Available in 300 Mil DIP and PLDCC
Immune to Latch-UP
5
6
7
8
9
10
11
O
A
12 13 14 15 16 17 18
4 3 2
1
5
O
A
6
2
Chip Carrier
GND
A
7
57C49C-45
NC O
NC
1
V
45 ns
25 ns
28 27 26
CC
3
O
A
4
8
O
A
9
25
24
23
22
21
20
19
5
TOP VIEW
A
CS1/V
A
A
NC
O
O
10
11
12
7
6
57C49C-55
PP
55 ns
25 ns
GND
CERDIP/Plastic DIP
O
O
O
A
A
A
A
A
A
A
A
7
6
5
4
3
2
1
0
0
1
2
WS57C49C
1
2
3
4
5
6
7
8
9
10
11
12
Flatpack
57C49C-70
24
23
22
21
20
19
18
17
16
15
14
13
70 ns
25 ns
V
A
A
A 10
CS1/V
A
A
O
O
O
O
O
CC
8
9
11
12
7
6
5
4
3
2-39
PP

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WS57C49C Summary of contents

Page 1

... Bipolar counterparts. A further advantage of the WS57C49C over Bipolar PROM devices is the fact that it utilizes a proven EPROM technology. This enables the entire memory array to be tested for switching characteristics and functionality after assembly. Unlike devices which cannot be erased, every WS57C49C in a windowed package is 100% tested with worst case test patterns both before and after assembly ...

Page 2

... WS57C49C ABSOLUTE MAXIMUM RATINGS* Storage Temperature............................–65° 150°C Voltage on any Pin with Respect to Ground ....................................–0.6V to +7V V with Respect to Ground...................–0. 13V PP ESD Protection .................................................. * NOTICE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of ...

Page 3

... AC READ TIMING DIAGRAM ADDRESSES CS OUTPUTS Over Operating Range. (See Above) 57C49C-25 57C49C-35 57C49C-45 57C49C-55 57C49C-70 MIN MAX MIN MAX MIN MAX VALID t ACC t CS VALID WS57C49C UNITS MIN MAX MIN MAX 2-41 ...

Page 4

... WS57C49C CAPACITANCE ( 25° MHz A SYMBOL PARAMETER C Input Capacitance IN C Output Capacitance OUT C V Capacitance VPP PP NOTES: 4. This parameter is only sampled and is not 100% tested. 5.Typical values are for T = 25°C and nominal supply voltages. A TEST LOAD (High Impedance Test Systems ...

Page 5

... SUPPLY VOLTAGE ( V ) NORMALIZED T aa vs. AMBIENT TEMPERATURE 1.6 1.4 1.2 1.0 0.8 0.6 -55 -35 - AMBIENT TEMPERATURE ( °C ) TYPICAL ACCESS TIME CHANGE 40.0 35.0 30.0 25.0 20.0 15.0 10.0 5.0 0.0 6.0 0.0 NORMALIZED SUPPLY CURRENT 1.2 1.1 1.0 0.9 0.8 -55 -35 -15 85 105 125 WS57C49C vs. OUTPUT LOADING 200 400 600 800 1000 CAPACITANCE ( pF ) vs. AMBIENT TEMPERATURE 105 125 AMBIENT TEMPERATURE (°C) 2-43 ...

Page 6

... WS57C49C PROGRAMMING INFORMATION DC CHARACTERISTICS SYMBOLS Input Leakage Current Supply Current During Programming Pulse I V Supply Current CC CC Output Low Voltage During Verify mA) OL Output High Voltage During Verify –4 mA) OH NOTES must not be greater than 13 volts including overshoot. ...

Page 7

... WS57C49C-70TMB 70 NOTE: The actual part marking will not include the initials "WS." * SMD product. See section 4 for SMD number. PROGRAMMING/ALGORITHMS/ERASURE/PROGRAMMERS The WS57C49C is programmed using Algorithm D shown on page 5-9. Return to Main Menu PACKAGE PACKAGE TYPE DRAWING 24 Pin CERDIP, 0.6" Pin PLDCC J3 24 Pin Plastic DIP, 0.3" ...

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