PEEL22CV10 ETC, PEEL22CV10 Datasheet

no-image

PEEL22CV10

Manufacturer Part Number
PEEL22CV10
Description
CMOS Programmable Electrically Erasable Logic Device
Manufacturer
ETC
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PEEL22CV10AJ
Manufacturer:
ICT
Quantity:
2 300
Part Number:
PEEL22CV10AJ
Manufacturer:
ICT
Quantity:
2 300
Part Number:
PEEL22CV10AJ
Manufacturer:
ICT
Quantity:
2 600
Part Number:
PEEL22CV10AJ-10
Manufacturer:
ICT
Quantity:
2 492
Part Number:
PEEL22CV10AJ-10
Manufacturer:
ICT
Quantity:
2 500
Part Number:
PEEL22CV10AJ-15L
Manufacturer:
ICT
Quantity:
16 742
Part Number:
PEEL22CV10AJ-25
Manufacturer:
ICT
Quantity:
20 000
Part Number:
PEEL22CV10AJ-25L
Manufacturer:
ICT
Quantity:
3 769
Features
General Description
The PEEL™22CV10A is a Programmable Electrically Eras-
able Logic (PEEL™) device providing an attractive alterna-
tive to ordinary PLDs. The PEEL™22CV10A offers the
performance, flexibility, ease of design and production
practicality
PEEL™22CV10A is available in 24-pin DIP, SOIC, TSSOP
and 28-pin PLCC packages (see Figure 1), with speeds
ranging from 7ns to 25ns and with power consumption as
low as 30mA. EE-reprogrammability provides the conve-
nience of instant reprogramming for development and a
reusable production inventory, minimizing the impact of
programming changes or errors. EE-reprogrammability
Figure 1. Pin Configuration
DIP
*Optional extra ground pin for
PLCC
-7/I-7 speed grade.
High Speed/Low Power
Electrically Erasable Technology
Development/Programmer Support
- Speeds ranging from 7ns to 25ns
- Power as low as 30mA at 25MHz
- Superior factory testing
- Reprogrammable in plastic package
- Reduces retrofit and development costs
- Third party software and programmers
- ICT PLACE Development Software
CMOS Programmable Electrically Erasable Logic Device
needed by
I/CLK
TSSOP
GND
logic designers today. The
I
I
I
I
I
I
I
I
I
I
1
2
3
4
5
6
7
8
9
10
11
12
PEEL™ 22CV10A -7/-10/-15/-25
SOIC
24
23
22
21
20
19
18
17
16
15
14
13
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
1 of 10
also improves factory testability, thus ensuring the highest
quality possible. The PEEL™22CV10A is JEDEC file com-
patible with standard 22V10 PLDs. Eight additional configu-
rations per macrocell (a total of 12) are also available by
using
22CV10A+). The additional macrocell configurations allow
more logic to be put into every design. Programming and
development support for the PEEL™22CV10A are pro-
vided by popular third-party programmers and develop-
ment software. ICT also offers free PLACE development
software.
Figure 2. Block Diagram
Architectural Flexibility
Application Versatility
- 132 product term X 44 input AND array
- Up to 22 inputs and 10 outputs
- Up to 12 configurations per macrocell
- Synchronous preset, asynchronous clear
- Independent output enables
- 24-pin DIP/SOIC/TSSOP and 28-pin PLCC
- Replaces random logic
- Pin and JEDEC compatible with 22V10
- Enhanced Architecture fits more logic
than ordinary PLDs
the
“+”
software/programming
Commercial/
option
Industrial
04-02-009F
(i.e.,

Related parts for PEEL22CV10

PEEL22CV10 Summary of contents

Page 1

CMOS Programmable Electrically Erasable Logic Device Features High Speed/Low Power - Speeds ranging from 7ns to 25ns - Power as low as 30mA at 25MHz Electrically Erasable Technology - Superior factory testing - Reprogrammable in plastic package - Reduces retrofit ...

Page 2

I/CLK 110 I 111 121 I 124 130 I 131 I Figure 3. PEEL™22CV10A Logic Array Diagram ASYNCHRONOUS ...

Page 3

Function Description The PEEL™22CV10A implements logic functions as sum- of-products expressions in a programmable-AND/ fixed-OR logic array. User-defined functions are created by program- ming the connections of input signals into the array. User- configurable output structures in the form of ...

Page 4

... PEEL™22CV10A+ software option is used. The code can be read back even after the security bit has been set. The signature word can be used to identify the pattern pro- grammed into the device or to record the design revision, etc PEEL 22CV10A ...

Page 5

Figure 5. Four Configurations of the PEEL™22CV10A I/O Macrocell Table 1. PEEL™ 22CV10A Macrocell Configuration Bits Configuration # Input/Feedback Select Register Feedback Bi-Directional I ...

Page 6

Additional Macrocell Configurations Besides the standard four-configuration macrocells, each PEEL™22CV10A provides an additional eight configura- tions (twelve total) that can be used to increase design flex- ibility Figure 6. Twelve Configurations of the PEEL™22CV10A+ I/O Macrocell Table 2. PEEL™ 22CV10A+ ...

Page 7

Table 6. Absolute Maximum Ratings Symbol Parameter V Supply Voltage Voltage Applied to Any Pin I Output Current O T Storage Temperature ST T Lead Temperature LT Table 7. Operating Ranges Symbol Parameter V ...

Page 8

Table 9. A.C. Electrical Characteristics Symbol Parameter Input to non-registered output Input to output enable Input5 to output disable t Clock to Output CO1 Clock to comb. output delay via ...

Page 9

... Table 6. Ordering Information Part Number PEEL22CV10AP-7 PEEL22CV10API-7 PEEL 22CV10AJ-7 PEEL 22CV10AJI-7 PEEL 22CV10AS-7 PEEL 22CV10ASI-7 PEEL 22CV10AT-7 PEEL 22CV10ATI-7 PEEL 22CV10AP-10 PEEL 22CV10API-10 PEEL 22CV10AJ-10 PEEL 22CV10AJI-10 PEEL 22CV10AS-10 PEEL 22CV10ASI-10 PEEL 22CV10AT-10 PEEL 22CV10ATI-10 PEEL 22CV10AP-15 PEEL 22CV10API-15 PEEL 22CV10AJ-15 ...

Page 10

Device Part Number PEEL™ 22CV10A PI-25 Package P = Plastic 300mil DIP J = Plastic (J) Leaded Chip Carrier (PLCC SOIC T = TSSOP Suffix Temperature Range and Power Options (Blank) = Commercial 0 to 70° ...

Related keywords