K9F5608U0A-YIB0 Samsung semiconductor, K9F5608U0A-YIB0 Datasheet

K9F5608U0A-YIB0

Manufacturer Part Number

K9F5608U0A-YIB0

Description

32M x 8 Bit NAND Flash Memory

Manufacturer

Samsung semiconductor

Datasheet

1.K9F5608U0A-YIB0.pdf (29 pages)

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Document Title

Revision History

K9F5608U0A-YCB0,K9F5608U0A-YIB0

Note : For more detailed features and specifications including FAQ, please refer to Samsung’s Flash web site.

to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you have

any questions, please contact the SAMSUNG branch office near you.

The attached datasheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right

Revision No.

32M x 8 Bit NAND Flash Memory

http://www.intl.samsungsemi.com/Memory/Flash/datasheets.html

0.0

0.1

0.2

0.3

0.4

History

Initial issue.

1. Support copy-back program

1. Explain how pointer operation works in detail.

2. For partial page programming into the copied page

3. Renamed GND input (pin # 6) on behalf of SE (pin # 6)

4. Updated operation for tRST timing

1. In addition, explain WE function in pin description

1.Powerup sequence is added

: Recovery time of minimum 1 s is required before internal circuit gets

2. AC parameter tCLR(CLE to RE Delay, min 50ns) is added.

3. AC parameter tAR1 value : 100ns --> 20ns

- The copy-back program is configured to quickly and efficiently rewrite

- Once the copy-back Program is finished, any additional partial page

ready for any command sequences

- The SE input controls the access of the spare area. When SE is high,

- If reset command(FFh) is written at Ready state, the device goes into

- The WE must be held high when outputs are activated.

need to be copied to the newly assigned free block.

data stored in one page within the array to another page within the

same array without utilizing an external memory. Since the time-con

suming sequently-reading and its re-loading cycles are removed, the

system performance is improved. The benefit is especially obvious

when a portion of a block is updated so that the rest of the block also

programming into the copied pages is prohibited before erase.

the spare area is not accessible for reading or programming. SE is rec

ommended to be coupled to GND or Vcc and should not be toggled

during reading or programming.

=> Connect this input pin to GND or set to static low state unless the

sequential read mode excluding spare area is used.

Busy for maximum 5us.

~ 2.5V

High

~ 2.5V

Draft Date

July 17th 2000

Oct. 4th 2000

Nov. 20th 2000

Mar. 2th 2001

Jul. 22th 2001

FLASH MEMORY

Remark

Information

Preliminary

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