X24645P Xicor, X24645P Datasheet

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X24645P

Manufacturer Part Number
X24645P
Description
Advanced 2-Wire Serial E 2 PROM with Block Lock TM Protection
Manufacturer
Xicor
Datasheet

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Part Number
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Quantity
Price
Part Number:
X24645P
Manufacturer:
XICOR
Quantity:
5 510
Part Number:
X24645P
Manufacturer:
INTERSIL
Quantity:
5 510
Preliminary Information
FUNCTIONAL DIAGRAM
FEATURES
2783-3.5 5/13/96 T1/C0/D0 NS
64K
Xicor, 1995, 1996 Patents Pending
2.7V to 5.5V Power Supply
Low Power CMOS
—Active Read Current Less Than 1mA
—Active Write Current Less Than 3mA
—Standby Current Less Than 1 A
Internally Organized 8192 x 8
New Programmable Block Lock Protection
—Software Write Protection
—Programmable hardware Write Protect
Block Lock (0, 1/4, 1/2, or all of the E
array)
2 Wire Serial Interface
Bidirectional Data Transfer Protocol
32 Byte Page Write Mode
—Minimizes Total Write Time Per Byte
Self Timed Write Cycle
—Typical Write Cycle Time of 5ms
High Reliability
—Endurance: 100,000 Cycles
—Data Retention: 100 Years
Available Packages
—8-Lead PDIP
—8-Lead SOIC (JEDEC)
—14-Lead SOIC (JEDEC)
—20-Lead TSSOP
Advanced 2-Wire Serial E
V CC
V SS
SCL
WP
SDA
S 2
S 1
2
PROM
SLAVE ADDRESS
+COMPARATOR
START
LOGIC
STOP
REGISTER
2
X24645
PROM with Block Lock
D OUT
ACK
1
R/W
DESCRIPTION
The X24645 is a CMOS 65,536-bit serial E
internally organized 8192 x 8. The X24645 features a
serial interface and software protocol allowing opera-
tion on a simple two wire bus.
Two device select inputs (S
devices to share a common two wire bus.
A Write Protect Register at the highest address loca-
tion, 1FFFh, provides three new write protection
features: Software Write Protect, Block Write Protect,
and Hardware Write Protect. The Software Write
Protect feature prevents any nonvolatile writes to the
X24645 until the WEL bit in the write protect register is
set. The Block Write Protection feature allows the user
to individually write protect four blocks of the array by
programming two bits in the write protect register. The
Programmable Hardware Write Protect feature allows
the user to install the X24645 with WP tied to V
program the entire memory array in place, and then
enable the hardware write protection by programming
a WPEN bit in the write protect register. After this,
selected blocks of the array, including the write protect
register itself, are permanently write protected, as long
as WP remains HIGH.
LOAD
ADDRESS
COUNTER
WORD
CONTROL
LOGIC
PIN
INC
START CYCLE
WRITE PROTECT
REGISTER AND
XDEC
LOGIC
TM
CK
Characteristics subject to change without notice
Protection
H.V. GENERATION
DATA REGISTER
1
CONTROL
TIMING &
256 X 256
, S
E
2
YDEC
PROM
8
2
8192 x 8 Bit
) allow up to four
2783 ILL F01
D OUT
2
PROM,
CC
,

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X24645P Summary of contents

Page 1

... Available Packages —8-Lead PDIP —8-Lead SOIC (JEDEC) —14-Lead SOIC (JEDEC) —20-Lead TSSOP FUNCTIONAL DIAGRAM Xicor, 1995, 1996 Patents Pending 2783-3.5 5/13/96 T1/C0/D0 NS X24645 2 PROM with Block Lock DESCRIPTION The X24645 is a CMOS 65,536-bit serial E internally organized 8192 x 8. The X24645 features a serial interface and software protocol allowing opera- tion on a simple two wire bus ...

Page 2

... X24645 2 Xicor E PROMs are designed and tested for applica- tions requiring extended endurance. Inherent data retention is greater than 100 years. PIN DESCRIPTIONS Serial Clock (SCL) The SCL input is used to clock all data into and out of the device. Serial Data (SDA) SDA is a bidirectional pin used to transfer data into and out of the device ...

Page 3

X24645 DEVICE OPERATION The X24645 supports a bidirectional bus oriented pro- tocol. The protocol defines any device that sends data onto the bus as a transmitter, and the receiving device as the receiver. The device controlling the transfer is a ...

Page 4

X24645 Stop Condition All communications must be terminated by a stop condition, which is a LOW to HIGH transition of SDA when SCL is HIGH. The stop condition is also used to place the device into the standby power mode ...

Page 5

X24645 DEVICE ADDRESSING Following a start condition the master must output the address of the slave it is accessing (see Figure 4). The next two bits are the device select bits. A system could have up to four X24645’s on ...

Page 6

X24645 Page Write The X24645 is capable of a 32-byte page write opera- tion initiated in the same manner as the byte write operation, but instead of terminating the write cycle af- ter the first data word is ...

Page 7

X24645 READ OPERATIONS Read operations are initiated in the same manner as write operations with the exception that the R/ W bit of the slave address is set HIGH. There are three basic read operations: current address read, random read ...

Page 8

X24645 Sequential Read Sequential reads can be initiated as either a current address read or random access read. The first byte is transmitted as with the other modes, however, the master now responds with an acknowledge, indicating it requires additional ...

Page 9

X24645 WRITE PROTECT REGISTER The Write Protect Register (WPR) is located at the highest address, 1FFFh. Figure 11. Write Protect Register WPR (ADDR = 1FFFh WPEN 0 0 BP1 BP0 WPR.1 = WEL – “Write ...

Page 10

X24645 Block Protect Bits The Block Protect Bits BP0 and BP1 determine which blocks of the memory are write-protected: Table 1. Block Protect Bits Protected BP1 BP0 Addresses 0 0 None 0 1 1800h–1FFFh 1 0 1000h–1FFFh 1 1 0000h–1FFFh ...

Page 11

X24645 ABSOLUTE MAXIMUM RATINGS* Temperature under Bias X24645.......................................– +135 C Storage Temperature ........................– +150 C Voltage on any Pin with Respect to V .................................... –1V to +7V SS D.C. Output Current ..............................................5mA Lead Temperature (Soldering, 10 ...

Page 12

X24645 A.C. CONDITIONS OF TEST Input Pulse Levels V CC Input Rise and Fall Times Input and Output Timing Levels A.C. OPERATING CHARACTERISTICS (Over the recommended operating conditions, unless otherwise specified.) Read & Write Cycle Limits Symbol f SCL Clock ...

Page 13

X24645 Bus Timing SCL t SU:STA SDA IN SDA OUT Write Cycle Limits Symbol Parameter (6) T Write Cycle Time WR The write cycle time is the time from a valid stop condition of a write sequence to the end ...

Page 14

X24645 PACKAGING INFORMATION HALF SHOULDER WIDTH ON ALL END PINS OPTIONAL 0.015 (0.38) TYP. 0.010 (0.25) NOTE: 1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH 8-LEAD PLASTIC DUAL IN-LINE PACKAGE TYPE P 0.430 ...

Page 15

X24645 PACKAGING INFORMATION 8-LEAD PLASTIC SMALL OUTLINE GULL WING PACKAGE TYPE S PIN 1 INDEX 0.010 (0.25) 0.020 (0.50) 0 – 8 0.016 (0.410) 0.037 (0.937) NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) 0.150 (3.80) 0.158 (4.00) PIN ...

Page 16

X24645 PACKAGING INFORMATION 14-LEAD PLASTIC SMALL OUTLINE GULL WING PACKAGE TYPE S PIN 1 INDEX PIN 1 0.014 (0.35) 0.020 (0.51) (4X) 7 0.050 (1.27) 0.010 (0.25) 0.020 (0.50) 0 – 8 0.016 (0.41) 0.037 (0.937) NOTE: ALL DIMENSIONS IN ...

Page 17

X24645 PACKAGING INFORMATION 20-LEAD PLASTIC, TSSOP PACKAGE TYPE V 0 – 8 See Detail “A” NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS) .025 (.65) BSC .169 (4.3) .252 (6.4) BSC .177 (4.5) .252 (6.4) .300 (6.6) .047 (1.20) ...

Page 18

... Xicor, Inc. makes no warranty of merchantability or fitness for any purpose. Xicor, Inc. reserves the right to discontinue production and change specifications and prices at any time and without notice. Xicor, Inc. assumes no responsibility for the use of any circuitry other than circuitry embodied in a Xicor, Inc. product. No other circuits, patents, licenses are implied. ...

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