AS7C31025B-10JC ALSC [Alliance Semiconductor Corporation], AS7C31025B-10JC Datasheet

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AS7C31025B-10JC

Manufacturer Part Number
AS7C31025B-10JC
Description
3.3V 128K X 8 CMOS SRAM (Center power and ground)
Manufacturer
ALSC [Alliance Semiconductor Corporation]
Datasheet
3/24/04, v. 1.3
Features
• Industrial and commercial temperatures
• Organization: 131,072 x 8 bits
• High speed
• Low power consumption: ACTIVE
• Low power consumption: STANDBY
• 6 T 0.18 u CMOS technology
Selection guide
Logic block diagram
March 2004
Maximum address access time
Maximum output enable access time
Maximum operating current
Maximum CMOS standby current
- 10/12/15/20 ns address access time
- 5, 6, 7, 8 ns output enable access time
- 252 mW / max @ 10 ns
- 18 mW / max CMOS
GND
V
A0
A1
A2
A3
A4
A5
A6
A7
A8
CC
Column decoder
512 x 256 x 8
Input buffer
(1,048,576)
Array
3.3V 128K X 8 CMOS SRAM (Center power and ground)
Alliance Semiconductor
Control
circuit
-10
10
70
WE
OE
5
5
CE
I/O7
I/O0
Pin arrangement
• Easy memory expansion with CE, OE inputs
• Center power and ground
• TTL/LVTTL-compatible, three-state I/O
• JEDEC-standard packages
• ESD protection ≥ 2000 volts
• Latch-up current ≥ 200 mA
-12
- 32-pin, 300 mil SOJ
- 32-pin, 400 mil SOJ
12
65
6
5
®
GND
I/O0
I/O1
V
I/O2
I/O3
WE
CE
A0
A1
A2
A3
A4
A5
A6
A7
CC
32-pin SOJ (300 mil)
32-pin SOJ (400 mil)
-15
15
60
7
5
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Copyright © Alliance Semiconductor. All rights reserved.
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
AS7C31025B
V
A16
A15
A14
A13
OE
I/O7
I/O6
GND
I/O5
I/O4
A12
A11
A10
A9
A8
-20
20
55
CC
8
5
P. 1 of 9
Unit
mA
mA
ns
ns

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AS7C31025B-10JC Summary of contents

Page 1

... ESD protection ≥ 2000 volts • Latch-up current ≥ 200 mA Pin arrangement I/O7 I/O0 WE Control OE circuit CE -10 - Alliance Semiconductor AS7C31025B 32-pin SOJ (300 mil) 32-pin SOJ (400 mil) A16 A15 A14 A13 ...

Page 2

... When either chip enable or output enable is inactive or write enable is active, output drivers stay in high-impedance mode. All chip inputs and outputs are TTL-compatible, and operation is from a single 3.3 V supply. The AS7C31025B is packaged in common industry standard packages. ...

Page 3

... V, CC ≥ V –0 – mA Min – 0 –4 mA Min 2.4 – NOMINAL CC Symbol Signals C A, CE, WE I/O I/O Alliance Semiconductor AS7C31025B Nominal Max Unit 3.3 3.6 V – 0 – 0 – – -12 -15 -20 – 1 – 1 – 1 – 1 – ...

Page 4

... OHZ t 0 – 0 – – 10 – Falling input 3,6,7 Data valid 3,6,8,9 t RC1 OLZ Data valid 50% Alliance Semiconductor AS7C31025B -15 -20 Unit 15 – 20 – ns – 15 – – 15 – – 7 – – 3 – – 3 – ...

Page 5

... OW 10, Data valid 10, Data valid Alliance Semiconductor AS7C31025B -15 -20 Unit 15 – 20 – – 12 – – 12 – – 0 – – 12 – – 0 – – ...

Page 6

... All write cycle timings are referenced from the last valid address to the first transitioning address pF, except all high Z and low Z parameters where pF. 3/24/04, v. 1.3 ® Thevenin equivalent: 168 Ω D OUT D OUT 255 Ω 10% Figure B: 3.3 V Output load required to meet I specification Alliance Semiconductor AS7C31025B +1.728 V +3.3 V 320 Ω GND ...

Page 7

... E2 0.330 0.340 e 0.050 BSC 3/24/04, v. 1.3 ® Seating b plane 32-pin SOJ 400 mil Min Max 0.132 0.146 0.025 - 0.105 0.115 0.026 0.032 0.015 0.020 0.007 0.013 0.820 0.830 0.354 0.378 0.395 0.405 0.435 0.445 0.050 BSC Alliance Semiconductor AS7C31025B ...

Page 8

... SRAM Device Access 3 = 3.3 V prefix number CMOS 3/24/04, v. 1.3 ® AS7C31025B-10TJC AS7C31025B-12TJC AS7C31025B-10TJI AS7C31025B-12TJI AS7C31025B-10JC AS7C31025B-12JC AS7C31025B-10JI AS7C31025B-12JI AS7C31025B-10TJCN) –XX X Package: Temperature range TJ = SOJ 300 mil C = commercial, 0° 70° C time J = SOJ 400 mil I = industrial, -40° 85° C Alliance Semiconductor AS7C31025B ...

Page 9

... Alliance products in such life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use. ® Copyright © Alliance Semiconductor All Rights Reserved Part Number: AS7C31025B Document Version: v. 1.3 AS7C31025B ...

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