EVAL-AD7450ACB

Manufacturer Part NumberEVAL-AD7450ACB
DescriptionDifferential Input, 1 MSPS 10-Bit and 12-Bit ADCs in an 8-Lead SOT-23
ManufacturerAD [Analog Devices]
EVAL-AD7450ACB datasheet
 


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FEATURES
Fast throughput rate: 1 MSPS
Specified for V
of 3 V and 5 V
DD
Low power at max throughput rate:
4 mW max at 1 MSPS with 3 V supplies
9.25 mW max at 1 MSPS with 5 V supplies
Fully differential analog input
Wide input bandwidth:
70 dB SINAD at 100 kHz input frequency
Flexible power/serial clock speed management
No pipeline delays
High speed serial interface:
SPI®/QSPI™/MICROWIRE™/DSP compatible
Power-down mode: 1 µA max
8-lead SOT-23 and MSOP packages
APPLICATIONS
Transducer interface
Battery-powered systems
Data acquisition systems
Portable instrumentation
Motor control
GENERAL DESCRIPTION
1
The AD7440/AD7450A
are 10-bit and 12-bit high speed, low
power, successive approximation (SAR) analog-to-digital
converters with a fully differential analog input. These parts
operate from a single 3 V or 5 V power supply and use advanced
design techniques to achieve very low power dissipation at
throughput rates up to 1 MSPS. The SAR architecture of these
parts ensures that there are no pipeline delays.
The parts contain a low noise, wide bandwidth, differential
track-and-hold amplifier (T/H) that can handle input
frequencies up to 3.5 MHz. The reference voltage is applied
externally to the V
pin and can be varied from 100 mV to
REF
3.5 V depending on the power supply and what suits the
application. The value of the reference voltage determines the
common-mode voltage range of the part. With this truly
differential input structure and variable reference input, the user
can select a variety of input ranges and bias points.
The conversion process and data acquisition are controlled
using CS and the serial clock, allowing the device to interface
with microprocessors or DSPs. The input signals are sampled
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Differential Input, 1 MSPS
10-Bit and 12-Bit ADCs in an 8-Lead SOT-23
FUNCTIONAL BLOCK DIAGRAM
V
V
IN+
V
IN–
V
REF
AD7440/AD7450A
GND
on the falling edge of CS ; the conversion is also initiated at this
point. The SAR architecture of these parts ensures that there are
no pipeline delays. The AD7440 and the AD7450A use ad-
vanced design techniques to achieve very low power dissipation
at high throughput rates.
PRODUCT HIGHLIGHTS
1.
Operation with either 3 V or 5 V power supplies.
2.
High throughput with low power consumption.
With a 3 V supply, the AD7440/AD7450A offer 4 mW
max power consumption for 1 MSPS throughput.
3.
Fully differential analog input.
4.
Flexible power/serial clock speed management.
The conversion rate is determined by the serial clock,
allowing the power to be reduced as the conversion time
is reduced through the serial clock speed increase. These
parts also feature a shutdown mode to maximize power
efficiency at lower throughput rates.
5.
Variable voltage reference input.
6.
No pipeline delay.
Accurate control of the sampling instant via a CS input and
7.
once-off conversion control.
8.
ENOB > eight bits typically with 100 mV reference.
1
Protected by U.S. Patent Number 6,681,332.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.326.8703
AD7440/AD7450A
DD
12-BIT
SUCCESSIVE
T/H
APPROXIMATION
ADC
SCLK
SDATA
CONTROL LOGIC
CS
Figure 1.
www.analog.com
© 2004 Analog Devices, Inc. All rights reserved.

EVAL-AD7450ACB Summary of contents

  • Page 1

    FEATURES Fast throughput rate: 1 MSPS Specified for and Low power at max throughput rate max at 1 MSPS with 3 V supplies 9.25 mW max at 1 MSPS with 5 ...

  • Page 2

    ... Changes to Table 2 footnotes ............................................................. 5 Changes to Table 3 footnotes ............................................................. 7 Digital Inputs .............................................................................. 20 Reference ..................................................................................... 20 Single-Ended Operation............................................................ 20 Serial Interface ............................................................................ 21 Modes of Operation ....................................................................... 23 Normal Mode.............................................................................. 23 Power-Down Mode .................................................................... 23 Power-Up Time .......................................................................... 24 Power vs. Throughput Rate....................................................... 24 Microprocessor and DSP Interfacing ...................................... 25 Grounding and Layout Hints.................................................... 26 Evaluating the AD7440/AD7450A Performance ................... 26 Outline Dimensions ....................................................................... 27 Ordering Guide............................................................................... 28 Rev Page ...

  • Page 3

    AD7440–SPECIFICATIONS Table 2 3 MHz SCLK 2 REF CM REF A MIN Parameter DYNAMIC PERFORMANCE Signal-to-(Noise ...

  • Page 4

    AD7440/AD7450A Parameter CONVERSION RATE Conversion Time 2 Track-and-Hold Acquisition Time Throughput Rate POWER REQUIREMENTS Normal Mode (Static) Normal Mode (Operational) Full Power-Down Mode Power Dissipation Normal Mode (Operational) Full Power-Down 1 Common-mode voltage. The input ...

  • Page 5

    AD7450A–SPECIFICATIONS Table 2 3 MHz SCLK 2 REF CM REF A MIN Parameter DYNAMIC PERFORMANCE Signal-to-(Noise ...

  • Page 6

    AD7440/AD7450A Parameter CONVERSION RATE Conversion Time 2 Track-and-Hold Acquisition Time Throughput Rate POWER REQUIREMENTS Normal Mode (Static) Normal Mode (Operational) Full Power-Down Mode Power Dissipation Normal Mode (Operational) Full Power-Down 1 Common-mode voltage. The input ...

  • Page 7

    TIMING SPECIFICATIONS Guaranteed by characterization. All input signals are specified with (10 1.6 V. See Figure 2, Figure 3, and the Serial Interface section. Table 2.7 V ...

  • Page 8

    AD7440/AD7450A ABSOLUTE MAXIMUM RATINGS T = 25°C, unless otherwise noted. A Table 4. Parameter V to GND GND IN GND IN– Digital Input Voltage to GND Digital Output Voltage to GND V to GND REF ...

  • Page 9

    PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS AD7440/ SCLK 2 7 AD7450A SDATA 3 6 TOP VIEW CS (Not to Scale Figure 5. Pin Configuration for 8-Lead SOT-23 Table 5. Pin Function Descriptions Mnemonic Function V ...

  • Page 10

    AD7440/AD7450A TERMINOLOGY Signal-to-(Noise + Distortion) Ratio This is the measured ratio of signal to (noise + distortion) at the output of the ADC. The signal is the rms amplitude of the fundamental. Noise is the sum of all nonfundamental signals ...

  • Page 11

    Positive Gain Error This is the deviation of the last code transition (011...110 to 011...111) from the ideal V – V (i.e., +V IN+ IN– the zero code error has been adjusted out. Negative Gain Error This is the deviation ...

  • Page 12

    AD7440/AD7450A AD7440/AD7450A–TYPICAL PERFORMANCE CHARACTERISTICS T = 25° MSPS MHz, unless otherwise noted SCLK 100 FREQUENCY (kHz) Figure 7. AD7450A SINAD vs. Analog Input Frequency ...

  • Page 13

    POSITIVE DNL 0.5 0 –0.5 NEGATIVE DNL –1.0 0 0.5 1.0 1.5 2.0 2.5 V (V) REF Figure 13. Change in DNL vs. V for the AD7450A for V REF 2.5 2.0 1.5 1.0 POSITIVE ...

  • Page 14

    AD7440/AD7450A 10,000 10,000 IN+ IN– CODES 10,000 CONVERSIONS 9,000 f = 1MSPS S 8,000 7,000 6,000 5,000 4,000 3,000 2,000 1,000 0 2044 2045 2046 2047 CODE Figure 19. Histogram of 10,000 Conversions Input ...

  • Page 15

    CIRCUIT INFORMATION The AD7440/AD7450A are 10-bit and 12-bit fast, low power, single-supply, successive approximation analog-to-digital converters (ADCs). They can operate with power supply and are capable of throughput rates MSPS when ...

  • Page 16

    AD7440/AD7450A TYPICAL CONNECTION DIAGRAM Figure 26 shows a typical connection diagram for the AD7440/AD7450A for both 5 V and 3 V supplies. In this setup, the GND pin is connected to the analog ground plane of the system. The V ...

  • Page 17

    Figure 30 shows examples of the inputs to V different values of V for also gives the maximum REF DD and minimum common-mode voltages for each reference value according to Figure 28. REFERENCE = 2V ...

  • Page 18

    AD7440/AD7450A DRIVING DIFFERENTIAL INPUTS Differential operation requires V and V IN+ simultaneously with two equal signals that are 180° out of phase. The common mode must be set up externally and has a range determined the power ...

  • Page 19

    Op Amp Pair An op amp pair can be used to directly couple a differential signal to the AD7440/AD7450A. The circuit configurations shown in Figure 35 and Figure 36 show how a dual op amp can be used to convert ...

  • Page 20

    AD7440/AD7450A DIGITAL INPUTS The digital inputs applied to the device are not limited by the maximum ratings, which limit the analog limits. Instead the digital inputs applied, CS and SCLK, can and are not restricted by ...

  • Page 21

    R 2.5V +2. –2. 0.1µF EXTERNAL V (2.5V) REF Figure 39. Applying a Bipolar Single-Ended Input to the AD7440/AD7450A SERIAL INTERFACE Figure 2 and Figure 3 show detailed timing diagrams for the serial interface ...

  • Page 22

    AD7440/AD7450A Timing Example 1 Having MHz and a throughput rate of 1 MSPS gives a SCLK cycle time of 1/Throughput = 1/1,000,000 = 1 µs A cycle consists 12.5(1 SCLK ...

  • Page 23

    MODES OF OPERATION The operational mode of the AD7440/AD7450A is selected by controlling the logic state of the CS signal during a conversion. There are two possible modes of operation, normal and power down. The point at which CS is ...

  • Page 24

    AD7440/AD7450A brought high before the 10th falling edge of SCLK, the AD7440/AD7450A again goes back into power-down. This avoids accidental power-up due to glitches on the CS line or an inadvertent burst of eight SCLK cycles while ...

  • Page 25

    Thus, the average power dissipated during each cycle with a throughput rate of 100 kSPS is (2/10) × 0.8 mW. This is how the power numbers in Figure 44 are calculated. For throughput rates above 320 kSPS, ...

  • Page 26

    ... The evaluation board controller can be used in conjunction with the AD7440/AD7450A evaluation board, as well as many other Analog Devices evaluation boards ending with the CB designator, to demonstrate and evaluate the ac and dc performance of the AD7440/AD7450A. DSP56xxx* The software allows the user to perform ac (fast Fourier transform) and dc (histogram of codes) tests on the device ...

  • Page 27

    OUTLINE DIMENSIONS 1.60 BSC 1.30 1.15 0.90 0.15 MAX 2.90 BSC 2.80 BSC PIN 1 0.65 BSC 1.95 BSC 1.45 MAX 0.22 0.08 0.38 0.22 SEATING PLANE COMPLIANT TO JEDEC STANDARDS MO-178BA ...

  • Page 28

    ... Evaluation board controller. This board is a complete unit allowing control and communicate with all Analog Devices’ evaluation boards ending in the CB designator. For a complete evaluation kit, order the ADC evaluation board (that is, the EVAL-AD7450ACB or EVAL-AD7440CB), the EVAL-CONTROL BRD2, and transformer. See the AD7440/AD7450A application note that accompanies the evaluation kit for more information. © ...