EVAL-AD7450ACB AD [Analog Devices], EVAL-AD7450ACB Datasheet - Page 22

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EVAL-AD7450ACB

Manufacturer Part Number
EVAL-AD7450ACB
Description
Differential Input, 1 MSPS 10-Bit and 12-Bit ADCs in an 8-Lead SOT-23
Manufacturer
AD [Analog Devices]
Datasheet
AD7440/AD7450A
Timing Example 1
Having F
cycle time of
A cycle consists of
Therefore, if t
This 296 ns satisfies the requirement of 290 ns for t
From Figure 40, t
where t
satisfying the minimum requirement of 60 ns.
8
= 35 ns. This allows a value of 122 ns for t
SCLK
= 18 MHz and a throughput rate of 1 MSPS gives a
2
10 ns + 12.5(1/18 MHz) + t
1/Throughput = 1/1,000,000 = 1 µs
= 10 ns
ACQ
t
2
+ 12.5(1/F
comprises
2.5(1/F
t
ACQ
SCLK
SCLK
= 296 ns
) + t
) + t
8
+ t
ACQ
QUIET
= 1 µs
ACQ
= 1 µs
QUIET
ACQ
.
,
Rev. B | Page 22 of 28
Timing Example 2
Having F
cycle time of
A cycle consists of
Therefore, if t
This 664 ns satisfies the requirement of 290 ns for t
From Figure 40, t
where t
satisfying the minimum requirement of 60 ns.
As in this example and with other slower clock values, the signal
may already be acquired before the conversion is complete, but
it is still necessary to leave 60 ns minimum t
conversions. In Timing Example 2, the signal should be fully
acquired at approximately Point C in Figure 40.
8
= 35 ns. This allows a value of 129 ns for t
SCLK
10 ns + 12.5(1/5 MHz) + t
= 5 MHz and a throughput rate of 315 kSPS gives a
1/Throughput = 1/315,000 = 3.174 µs
2
is 10 ns
t
2
+ 12.5(1/F
ACQ
comprises
2.5(1/F
t
ACQ
SCLK
SCLK
= 664 ns
) + t
) + t
ACQ
8
+ t
ACQ
= 3.174 µs
QUIET
= 3.174 µs
QUIET
between
QUIET,
ACQ
.

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